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參數(shù)資料
| 型號： | ISL97522IRZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | 4-Channel TFT-LCD Supply |
| 中文描述： | LIQUID CRYSTAL DISPLAY DRIVER, QCC38 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-220, QFN-38 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 418K |
| 代理商： | ISL97522IRZ-T |
14
FN7445.0
December 13, 2006
The V
ON
power supply is used to power the positive supply
of the row driver in the LCD panel. The DC/DC consists of an
external diode-capacitor charge pump powered from the
switch node (LXB) of the A
VDD
converter, followed by a low
dropout linear regulator (LDO_ON). The LDO_ON regulator
uses an external PNP transistor as the pass element. The
onboard LDO controller is a wide band (>10MHz)
transconductance amplifier capable of 5mA output current,
which is sufficient for up to 50mA or more output current
under the low dropout condition (forced beta of 10). Typical
V
ON
voltage supported by the ISL97522 ranges from +15V
to +36V. A fault comparator is also included for monitoring
the output voltage. The undervoltage threshold is set at
16.7% below the 1.2V reference.
The V
OFF
power supply is used to power the negative
supply of the row driver in the LCD panel. The DC/DC
consists of an external diode-capacitor charge pump
powered from the switch node (LXB) of the A
VDD
converter,
followed by a low dropout linear regulator (LDO_OFF). The
LDO_OFF regulator uses an external NPN transistor as the
pass element. The onboard LDO controller is a wide band
(>10MHz) transconductance amplifier capable of 5mA
output current, which is sufficient for up to 50mA or more
output current under the low dropout condition (forced beta
of 10). Typical V
OFF
voltage supported by the ISL97522
ranges from -5V to -25V. A fault comparator is also included
for monitoring the output voltage. The undervoltage
threshold is set at 20% above the 1.0V reference level.Set-
Up LDOs Output Voltage.
Set-Up LDOs Output Voltage
Refer to Typical Application Diagram, the output voltages of
V
ON
, V
OFF
, and V
LOGIC
are determined by Equations 11
and 12:
Charge Pump
To generate an output voltage higher than A
VDD
, single or
multi stages of charge pumps are needed. The number of
stage is determined by the input and output voltage. For
positive charge pump stages:
where V
CE
is the dropout voltage of the pass component of
the linear regulator. It ranges from 0.3V to 1V depending on
the transistor. V
F
is the forward-voltage of the charge pump
rectifier diode.
The number of negative charge pump stages is given by:
To achieve high efficiency and low material cost, the lowest
number of charge pump stages, which can meet the above
requirements, is always preferred.
Charge Pump Output Capacitors
A ceramic capacitor with low ESR is recommended. With
ceramic capacitors, the output ripple voltage is dominated by
the capacitance value. The capacitance value can be
chosen by Equation 15.
Where f
SOC
is the switching frequency.
High Charge Pump Output Voltage (>36V)
Applications
In the applications where the charge pump output voltage is
over 36V, an external npn transistor need to be inserted into
between DRVP pin and base of pass transistor Q3 as shown
in Figure 19; or the linear regulator can control only one
stage charge pump and regulate the final charge pump
output as shown in Figure 20.
-
+
GMN
-
+
36V
ESD
CLAMP
LDO_OFF
1 : Nn
FBN
DRVN
R
BN
3k
Ω
0.1μF
0.1μF
CP (TO -26V)
C
OFF
V
OFF
(TO -20V)
ISINB
R
N1
R
N2
V
REF
PG_LDON
0.4V
FIGURE 18. V
OFF
FUNCTION BLOCK DIAGRAM
V
ON
V
FBP
1
R
11
---------
+
×
=
(EQ. 11)
V
OFF
V
FBN
R
21
---------
V
FBN
V
REF
–
(
)
×
+
=
(EQ. 12)
N
POSITIVE
V
--------------------------------–
V
V
F
–
+
INPUT
≥
(EQ. 13)
N
NEGATIVE
V
INPUT
V
F
+
-------------------------–
≥
(EQ. 14)
C
OUT
I
RIPPLE
OSC
------------------------------------------------------
≥
(EQ. 15)
ISL97522
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