參數(shù)資料
型號: ISL95711WIU10Z-T
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計(jì)
英文描述: Terminal Voltage 3V or 5V, 128 Taps I2C Serial Interface
中文描述: 10K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 128 POSITIONS, PDSO10
封裝: ROHS COMPLIANT, PLASTIC, MO-187BA, MSOP-10
文件頁數(shù): 7/12頁
文件大小: 333K
代理商: ISL95711WIU10Z-T
7
FN8241.2
August 15, 2005
Test Circuit
Equivalent Circuit
Pin Descriptions
Potentiometer Pins
R
H
AND R
L
The high (R
H
) and low (R
L
) terminals of the ISL95711 are
equivalent to the fixed terminals of a mechanical
potentiometer. R
H
and R
H
are referenced to the relative
position of the wiper and not the voltage potential on the
terminals. With WR set to 127, the wiper will be closest to
R
H
, and with the WR set to 00, the wiper is closest to R
L
R
W
R
w
is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the WR.
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin for the
I
2
C interface. It receives device address, operation code,
wiper register address and data from a I
2
C external master
device at the rising edge of the serial clock SCL, and it shifts
out data after each falling edge of the serial clock SCL.
SDA requires an external pull-up resistor, since it’s an open
drain input/output.
SERIAL CLOCK (SCL)
This input is the serial clock of the I
2
C serial interface.
SCL requires an external pull-up resistor, since it’s an open
drain input.
DEVICE ADDRESS (A1-A0)
The Address inputs are used to set the least significant 2 bits
of the 7-bit I
2
C interface slave address. A match in the slave
address serial data stream must be made with the Address
input pins in order to initiate communication with the
ISL95711. A maximum of 4 ISL95711 devices may occupy
the I
2
C serial bus.
Principles of Operation
The ISL95711 is an integrated circuit incorporating one DCP
with it’s associated register, non-volatile memory, and the
I
2
C serial interface providing direct communication between
a host and the potentiometer and memory. The resistor array
is comprised of individual resistors connected in series. At
either end of the array and between each resistor is an
electronic switch that transfers the potential at that point to
the wiper.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions.
When the device is powered-down, the last value stored in
the IVR will be maintained in the nonvolatile memory. When
power is restored, the contents of the IVR are recalled and
the wiper is set to that value.
The ISL95711 has dual supplies, V
CC
and V-. For proper
operation of the chip, it is recommended both power
supplies ramp up simultaneously to their final values within
20ms. The chip design gives priority to the V- supply
stabilization and then looks at V
CC
stabilization. As the V-
supply goes below -2.5V, the R
W
pin goes to the default
code of 64. As V
CC
also exceeds 2.5V (after V- < -2.5V), the
R
W
pin goes to the code stored in the EEPROM memory
value (this is referred as power on recall).
DCP Description
The DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of the
DCP are equivalent to the fixed terminals of a mechanical
potentiometer (R
H
and R
L
pins). The R
W
pin is connected to
intermediate nodes, and is equivalent to the wiper terminal
of a mechanical potentiometer. The position of the wiper
terminal is controlled by a 7-bit volatile Wiper Register (WR).
When the WR contains all zeroes (00h), the wiper terminal
(R
W
) is closest to its “Low” terminal (R
L
). When the WR
contains all ones (7Fh), the wiper terminal (R
W
) is closest to
its “High” terminal (R
H
). As the value of the WR increases
from all zeroes (00h) to all ones (7Fh), the wiper moves
monotonically from the position closest to R
L
to the position
closest to R
H
. At the same time, the resistance between R
W
and R
L
increases monotonically, while the resistance
between R
H
and R
W
decreases monotonically.
While the ISL95711 is being powered up, the WR is reset to
40h (64 decimal), which locates the R
W
at the center
FORCE
CURRENT
TEST POINT
R
W
C
H
C
L
R
W
R
TOTAL
C
W
R
H
R
L
ISL95711
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