參數(shù)資料
型號: ISL90841
廠商: Intersil Corporation
英文描述: Low Noise, Low Power I2C Bus, 256 Taps
中文描述: 低噪聲,低功耗I2C總線,256絲錐
文件頁數(shù): 5/12頁
文件大?。?/td> 1126K
代理商: ISL90841
5
FN8094.0
August 1, 2005
SDA vs SCL Timing
A0 and A1 Pin Timing
t
F
(Note 15)
SDA and SCL fall time
From 70% to 30% of V
CC
20 +
0.1 * Cb
250
ns
Cb
(Note 15)
Capacitive loading of SDA or SCL
Total on-chip and off-chip
10
400
pF
Rpu
(Note 15)
SDA and SCL bus pull-up resistor off-
chip
Maximum is determined by t
R
and t
F
For Cb = 400pF, max is about 2~2.5k
For Cb = 40pF, max is about 15~20k
1
k
t
SU:A
A1 and A0 setup time
Before START condition
600
ns
t
HD:A
A1 and A0 hold time
After STOP condition
600
ns
Operating Specifications
Over the recommended operating conditions unless otherwise specified.
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(NOTE 1)
MAX
UNIT
t
SU:STO
t
DH
t
HIGH
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
t
F
t
LOW
t
BUF
t
AA
t
R
t
HD:A
SCL
SDA IN
A0, A1
t
SU:A
CLK 1
START
STOP
ISL90841
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