
8
FN9234.0
December 22, 2005
Block Diagram
Functional Description
The ISL9005 contains all circuitry required to implement a 
high performance LDO. High performance is achieved 
through a circuit that delivers fast transient response to 
varying load conditions. In a quiescent condition, the 
ISL9005 adjusts its biasing to achieve the lowest standby 
current consumption.
The device also integrates current limit protection, smart 
thermal shutdown protection, and soft-start. Smart Thermal 
shutdown protects the device against overheating. 
Power Control
The ISL9005 has an enable pin, EN, to control power to the 
LDO output. When EN is low, the device is in shutdown 
mode. During this condition, all on-chip circuits are off, and 
the device draws minimum current, typically less than 0.1
μ
A. 
When the enable pin is asserted, the device first polls the 
output of the UVLO detector to ensure that VIN voltage is at 
least about 2.1V. Once verified, the device initiates a start-up 
sequence. During the start-up sequence, trim settings are 
first read and latched. Then, sequentially, the bandgap, 
reference voltage and current generation circuitry power up. 
Once the references are stable, a fast-start circuit powers up 
the LDO.
During operation, whenever the VIN voltage drops below 
about 1.84V, the ISL9005 immediately disables the LDO 
output. When VIN rises back above 2.1V, the device re-
initiates its start-up sequence and LDO operation will 
resume automatically.
Reference Generation
The reference generation circuitry includes a trimmed 
bandgap, a trimmed voltage reference divider, a trimmed 
current reference generator, and an RC noise filter. 
The bandgap generates a zero temperature coefficient (TC) 
voltage for the reference divider. The reference divider 
provides the regulation reference and other voltage 
references required for current generation and over-
temperature detection. 
The current generator outputs references required for 
adaptive biasing as well as references for LDO output 
current limit and thermal shutdown determination.
LDO Regulation and Programmable Output Divider
The LDO Regulator is implemented with a high-gain 
operational amplifier driving a PMOS pass transistor. The 
design of the ISL9005 provides a regulator that has low 
quiescent current, fast transient response, and overall 
stability across all operating and load current conditions. 
LDO stability is guaranteed for a 1
μ
F to 10
μ
F output 
capacitor that has a tolerance better than 20% and ESR less 
than 200m
. The design is performance-optimized for a 1
μ
F 
capacitor. Unless limited by the application, use of an output 
capacitor value above 4.7
μ
F is not recommended as LDO 
performance improvement is minimal. 
Soft-start circuitry integrated into each LDO limits the initial 
ramp-up rate to about 30
μ
s/V to minimize current surge. The 
ISL9005 provides short-circuit protection by limiting the 
output current to about 425mA.
The LDO uses an independently trimmed 1V reference as its 
input. An internal resistor divider drops the LDO output 
voltage down to 1V. This is compared to the 1V reference for 
regulation. The resistor division ratio is programmed in the 
factory.
Overheat Detection
The bandgap outputs a proportional-to-temperature current 
that is indicative of the temperature of the silicon. This 
current is compared with references to determine if the 
device is in danger of damage due to overheating. When the 
die temperature reaches about 140°C, if the LDO is sourcing 
more than 50mA it shuts down until the die cools sufficiently. 
Once the die temperature falls back below about 110°C, the 
disabled LDO is re-enabled and soft-start automatically 
takes place.
VO
GND
BANDGAP AND
TEMPERATURE
SENSOR
UVLO
VIN
SHORT CIRCUIT,
THERMAL PROTECTION,
SOFT-START
EN
CONTROL
LOGIC
1.0V
0.94V
0.9V
GND
VOLTAGE AND
REFERENCE
GENERATOR
ISL9005