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參數(shù)資料
| 型號(hào)： | ISL9000AIRPPZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Dual LDO with Low Noise, Very High PSRR, and Low IQ |
| 中文描述： | DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10 |
| 封裝： | 3 X 3 MM, ROHS COMPLIANT, PLASTIC, MO-229WEED-3, DFN-10 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 231K |
| 代理商： | ISL9000AIRPPZ |
4
FN6391.0
January 10, 2007
LDO Soft-Start Ramp Rate
T
SSR
Slope of linear portion of LDO output voltage ramp during
start-up
30
60
μ
s/V
EN1, EN2 PIN CHARACTERISTICS
Input Low Voltage
V
IL
-0.3
0.5
V
Input High Voltage
V
IH
1.4
V
IN
+0.3
V
Input Leakage Current
I
IL
, I
IH
0.1
μ
A
Pin Capacitance
C
PIN
Informative
5
pF
POR1, POR2 PIN CHARACTERISTICS
POR1, POR2 Thresholds
V
POR+
As a percentage of nominal output voltage
91
94
97
%
V
POR-
87
90
93
%
POR1 Delay
T
P1LH
1.0
2.0
3.0
ms
T
P1HL
25
μ
s
POR2 Delay
T
P2LH
C
POR
= 0.01
μ
F
100
200
300
ms
T
P2HL
25
μ
s
POR1, POR2 Pin Output Low
Voltage
V
OL
@I
OL
= 1.0mA
0.2
V
POR1, POR2 Pin Internal Pull-Up
Resistance
R
POR
78
100
180
k
Ω
NOTES:
3. Guaranteed by design and characterization.
4. VOx = 0.98 * VOx(NOM); Valid for VOx greater than 1.85V.
Electrical Specifications
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows:
T
A
= -40°C to +85°C; V
IN
= (V
O
+0.5V) to 6.5V with a minimum V
IN
of 2.3V; C
IN
= 1μF; C
O
= 1μF;
C
BYP
= 0.01μF; C
POR
= 0.01μF
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V
POR+
V
POR+
V
POR-
<t
P1HL
<t
P2HL
t
P2LH
t
P1LH
t
P1HL
t
P2HL
VO1
VO2
POR1
POR2
EN2
T
EN
V
POR-
FIGURE 1. TIMING PARAMETER DEFINITION
EN1
ISL9000A
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