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參數(shù)資料
| 型號(hào)： | ISL88716IP826Z |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | SPST, Snap-in Pushbuttons |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDIP8 |
| 封裝： | ROHS COMPLIANT, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 6/13頁 |
| 文件大小： | 518K |
| 代理商： | ISL88716IP826Z |
6
FN8092.0
October 18, 2005
Principles of Operation
The ISL88705 - ISL88813 devices provide those functions
needed for monitoring critical voltages such as power-supply
and battery functions in microprocessor systems. Features of
these supervisors include Power On Reset control, Supply
Voltage Supervision, Power-Fail Detection and Manual Reset
Assertion. The integration of all these features along with high
reset threshold accuracy and low power consumption make
these devices ideal for portable or battery-powered equipment.
Power-On Reset (POR)
Applying power to the device activates a POR circuit which
asserts reset (i.e. RST goes high while RST goes low). These
signals provide several benefits:
It prevents the system microprocessor from starting to
operate with insufficient voltage.
It prevents the processor from operating prior to stabilization
of the oscillator.
It ensures that the monitored device is held out of operation
until internal registers are properly loaded.
It allows time for an FPGA to download its configuration prior
to initialization of the circuit.
The reset signals remain active until V
DD
rises above the
minimum voltage sense level for time period t
POR
. This
ensures that the supply voltage has stabilized to sufficient
operating levels.
Low Voltage Monitoring
These devices monitor both the voltage level of V
DD
and an
auxiliary voltage on PFI.
When IC is initially biased reset is asserted until the V
DD
voltage is greater than the specific IC fixed-voltage trip point
for the t
POR
duration of 200ms. At any subsequent time that
V
DD
does not exceed its voltage threshold, reset is once
again asserted, i.e. RST is high and RST is low.
Power Failure Monitor
These devices also have a Power-Failure Monitor that helps
to monitor an additional critical voltage on the Power-Fail
Input (PFI) pin. For example, the PFI pin could be used to
provide an early power-fail warning, detect a low-battery
condition, presence detection or simply monitor a power
supply other than +5V. The 1.25V threshold detector can be
adjusted using an external resistor divider network to provide
custom voltage monitoring of voltages greater than 1.25V,
according to the following formula (See Figure 1):
PFI V
TH
= 1.25 (R1 + R2/R2)
PFO goes low whenever PFI is less than the 1.25V (or user-
set) threshold voltage.
FIGURE 3. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 4. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Typical Performance Curves
(Continued)
781mW
θ
JA
= 160°C/W
SO8
1.2
1
0.8
0.6
0.2
0
0
25
50
75
100
150
AMBIENT TEMPERATURE (°C)
P
125
85
JEDEC JESD51-3 LOW EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
0.4
1.136W
θ
JA
= 110°C/W
SO8
1.8
1.6
1.4
0.8
0.6
0.2
0
0
25
50
75
100
150
AMBIENT TEMPERATURE (°C)
P
125
85
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
0.4
1
1.2
FIGURE 5. CUSTOM V
TH
WITH RESISTOR DIVIDER ON PFI
V
IN
R
1
R
2
PFI
ISL88705, ISL88706, ISL88707, ISL88708, ISL88716, ISL88813
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