
6
FN6046.8
February 28, 2006
Receiver Input Resistance
RIN
-7V
≤ VCM ≤ 12V
Full
12
-
k
No-Load Supply Current, Note 3
ICC
ISL8488, ISL8489, DE, DI, RE = 0V or VCC
Full
-
160
250
A
ISL8490, ISL8491, DE, DI, RE = 0V or VCC
Full
-
500
565
A
ISL8485, DI, RE = 0V or
VCC
DE = VCC
Full
-
700
900
A
DE = 0V
Full
-
500
565
A
ISL8483, DI, RE = 0V or
VCC
DE = VCC
Full
-
470
650
A
DE = 0V
Full
-
160
250
A
Shutdown Supply Current
ISHDN
ISL8483, DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
1
50
nA
Driver Short-Circuit Current,
VO = High or Low
IOSD1
DE = VCC, -7V ≤ VY or VZ ≤ 12V, Note 4
Full
35
-
250
mA
Receiver Short-Circuit Current
IOSR
0V
≤ V
O ≤ VCC
Full
7
-
85
mA
SWITCHING CHARACTERISTICS (ISL8485, ISL8490, ISL8491)
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54, CL = 100pF, Figure 2
Full
18
30
50
ns
Driver Output Skew
tSKEW
RDIFF = 54, CL = 100pF, Figure 2
Full
-
2
10
ns
Driver Differential Rise or Fall Time
tR, tF
RDIFF = 54, CL = 100pF, Figure 2
Full
3
11
25
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND, Figure 3
Full
-
17
70
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC, Figure 3
Full
-
14
70
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND, Figure 3
Full
-
19
70
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, Figure 3
Full
-
13
70
ns
Receiver Input to Output Delay
tPLH, tPHL Figure 4
Full
30
40
150
ns
Receiver Skew | tPLH - tPHL |tSKD
Figure 4
25
-
5
-
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND, Figure 5
Full
-
9
50
ns
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC, Figure 5
Full
-
9
50
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND, Figure 5
Full
-
9
50
ns
Receiver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, Figure 5
Full
-
9
50
ns
Maximum Data Rate
fMAX
Note 11
Full
5
-
Mbps
SWITCHING CHARACTERISTICS (ISL8483, ISL8488, ISL8489)
Driver Input to Output Delay
tPLH, tPHL RDIFF = 54, CL = 100pF, Figure 2
Full
250
800
2000
ns
Driver Output Skew
tSKEW
RDIFF = 54, CL = 100pF, Figure 2
Full
-
160
800
ns
Driver Differential Rise or Fall Time
tR, tF
RDIFF = 54, CL = 100pF, Figure 2
Full
250
800
2000
ns
Driver Enable to Output High
tZH
CL = 100pF, SW = GND, Figure 3, Note 5
Full
250
-
2000
ns
Driver Enable to Output Low
tZL
CL = 100pF, SW = VCC, Figure 3, Note 5
Full
250
-
2000
ns
Driver Disable from Output High
tHZ
CL = 15pF, SW = GND, Figure 3
Full
300
-
3000
ns
Driver Disable from Output Low
tLZ
CL = 15pF, SW = VCC, Figure 3
Full
300
-
3000
ns
Receiver Input to Output Delay
tPLH, tPHL Figure 4
Full
250
350
2000
ns
Receiver Skew | tPLH - tPHL |tSKD
Figure 4
25
-
25
-
ns
Receiver Enable to Output High
tZH
CL = 15pF, SW = GND, Figure 5, Note 6
Full
-
10
50
ns
Receiver Enable to Output Low
tZL
CL = 15pF, SW = VCC, Figure 5, Note 6
Full
-
10
50
ns
Receiver Disable from Output High
tHZ
CL = 15pF, SW = GND, Figure 5
Full
-
10
50
ns
Electrical Specifications
Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified.
Typicals are at VCC = 5V, TA = 25°C, Note 2 (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
ISL8483, ISL8485, ISL8488, ISL8489, ISL8490, ISL8491