FN6190.0 November 3, 2005 Detailed Description The ISL84684II is a bidirectional, dual single pole/double throw (SPDT) analog switch that" />
參數(shù)資料
型號: ISL84684IIZ-T
廠商: Intersil
文件頁數(shù): 9/11頁
文件大?。?/td> 0K
描述: IC SWITCH DUAL SPDT 10WLCSP
標(biāo)準(zhǔn)包裝: 1
功能: 開關(guān)
電路: 2 x SPDT
導(dǎo)通狀態(tài)電阻: 500 毫歐
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.8 V ~ 4.5 V
電流 - 電源: 5nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-UFBGA,WLCSP
供應(yīng)商設(shè)備封裝: 10-WLCSP(2.0x1.5)
包裝: 剪切帶 (CT)
其它名稱: ISL84684IIZ-TCT
7
FN6190.0
November 3, 2005
Detailed Description
The ISL84684II is a bidirectional, dual single pole/double
throw (SPDT) analog switch that offers precise switching
capability from a single 1.8V to 4.5V supply with low on-
resistance (0.21
) and high speed operation (tON = 43ns,
tOFF = 27ns). The device is especially well suited for
portable battery powered equipment due to its low operating
supply voltage (1.8V), low power consumption (0.32
W max),
low leakage currents (150nA max), and the tiny chipscale
package. The ultra low on-resistance and RON flatness
provide very low insertion loss and distortion to applications
that require signal reproduction.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (see
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND.
If these conditions cannot be guaranteed, then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provide additional protection to limit the current in the
event that the voltage at a signal pin or logic pin goes below
ground or above the V+ rail.
Logic inputs can be protected by adding a 1k
resistor in
series with the logic input (see Figure 8). The resistor limits
the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch. Connecting schottky
diodes to the signal pins as shown in Figure 8 will shunt the
fault current to the supply or to ground thereby protecting the
switch. These schottky diodes must be sized to handle the
expected fault current.
Power-Supply Considerations
The ISL84684II construction is typical of most single supply
CMOS analog switches, in that they have two supply pins;
V+ and GND. V+ and GND drive the internal CMOS
switches and set their analog voltage limits. Unlike switches
with a 4V maximum supply voltage, the ISL84684II 5V
maximum supply voltage provides plenty of room for the
10% tolerance of a 4.3V supply, as well as room for
overshoot and noise spikes.
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
0V or V+
ANALYZER
V+
C
NO or NC
SIGNAL
GENERATOR
RL
GND
IN1
COM
50
N.C.
COM
NC or NO
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
V+
C
GND
NO or NC
COM
IN
IMPEDANCE
ANALYZER
0V or V+
Repeat test for all switches.
FIGURE 8. OVERVOLTAGE PROTECTION
GND
VCOM
VNX
V+
INX
OPTIONAL
PROTECTION
RESISTOR
OPTIONAL
SCHOTTKY
DIODE
OPTIONAL
SCHOTTKY
DIODE
ISL84684II
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