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參數(shù)資料
| 型號： | ISL81487LIPZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 13/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX RS-485/422 ESD 5V 8-PDIP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | RS422，RS485 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
8
FN6051.7
February 27, 2006
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a point-
to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any
combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 spec requires that
drivers must handle bus contention without sustaining any
damage.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
Receiver Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity
is
±200mV, as required by the RS-422 and RS-485
specifications.
Receiver input resistance of 96k
surpasses the RS-422
spec of 4k
, and is eight times the RS-485 “Unit Load (UL)”
requirement of 12k
minimum. Thus, these products are
known as “one-eighth UL” transceivers, and there can be up
to 256 of these devices on a network while still complying
with the RS-485 loading spec.
Receiver inputs function with common mode voltages as
great as
±7V outside the power supplies (i.e., +12V and
-7V), making them ideal for long networks where induced
voltages are a realistic concern.
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. RECEIVER PROPAGATION DELAY
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES
Test Circuits and Waveforms (Continued)
SIGNAL
GENERATOR
R
RO
RE
A
B
+1.5V
15pF
RO
3V
0V
tPLH
1.5V
VCC
0V
50%
tPHL
A
1k
VCC
GND
SW
(SHDN) for ISL8487E and ISL81487L only.
PARAMETER
DE
A
SW
tHZ
0
+1.5V
GND
tLZ
0-1.5V
VCC
tZH (Note 6)
0
+1.5V
GND
tZL (Note 6)
0
-1.5V
VCC
tZH(SHDN) (Note 7)
0
+1.5V
GND
tZL(SHDN) (Note 7)
0
-1.5V
VCC
SIGNAL
GENERATOR
R
RO
RE
A
B
15pF
RO
3V
0V
1.5V
VOH
0V
1.5V
VOH - 0.5V
tHZ
RO
VCC
VOL
1.5V
VOL + 0.5V
tLZ
RE
OUTPUT HIGH
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
NOTE 7
ISL8487E, ISL81487L, ISL81487E
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