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參數(shù)資料
| 型號(hào)： | ISL8102 |
| 廠商： | Intersil Corporation |
| 英文描述： | Two-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers |
| 中文描述： | 兩相降壓PWM控制器，帶有高電流集成MOSFET驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 11/27頁 |
| 文件大?。?/td> | 711K |
| 代理商： | ISL8102 |
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11
FN9247.0
October 19, 2005
transition low. During this time the current sense amplifier
uses the ISEN inputs to reproduce a signal proportional to
the inductor current, I
L
. This sensed current, I
SEN
, is simply
a scaled version of the inductor current. The sample window
opens exactly 1/6 of the switching period, t
SW
, after the
PWM transitions low. The sample window then stays open
the rest of the switching cycle until PWM transitions high
again, as illustrated in Figure 4.
The sampled current, at the end of the t
SAMPLE
, is
proportional to the inductor current and is held until the next
switching period sample. The sampled current is used only
for channel current balance.
The ISL8102 supports MOSFET r
DS(ON)
current sensing to
sample each channel’s current for channel current balance.
The internal circuitry, shown in Figure 5 represents channel
n of an N-channel converter. This circuitry is repeated for
each channel in the converter, but may not be active
depending on the status of the 2PH pin, as described in the
PWM Operation
section.
The ISL8102 senses the channel load current by sampling
the voltage across the lower MOSFET r
DS(ON)
, as shown in
Figure 5. A ground-referenced operational amplifier, internal
to the ISL8102, is connected to the PHASE node through a
resistor, R
ISEN
. The voltage across R
ISEN
is equivalent to
the voltage drop across the r
DS(ON)
of the lower MOSFET
while it is conducting. The resulting current into the ISEN pin
is proportional to the channel current, I
L
. The ISEN current is
sampled and held as described in the
Current Sampling
section. From Figure 5, the following equation for I
n
is
derived where I
L
is the channel current.
r
)
R
ISEN
Output Voltage Setting
The ISL8102 uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the REF0 and REF1 pins. The DAC decodes the 2-bit logic
signals into one of the discrete voltages shown in Table 1.
Each REF0 and REF1 pins are pulled up to an internal 1.2V
voltage by weak current sources (40
μ
A current, decreasing
to 0 as the voltage at the REF0, REF1 pins varies from 0 to
the internal 1.2V pull-up voltage). External pull-up resistors
or active-high output stages can augment the pull-up current
sources, up to a voltage of 5V. The DAC pin must be
connected to REF pin through a 1-5k
resistor and a filter
capacitor (0.022
μ
F) is connected between REF and GND.
The ISL8102 accommodates the use of external voltage
reference connected to REF pin if a different output voltage
is required. The DAC voltage must be set at least as high as
external reference. The error amp internal noninverting input
is the lower of REF or (DAC +300mV).
A third method for setting the output voltage is to use a
resistor divider (R
P1
, R
S1
) from the output terminal (V
OUT
)
to VSEN pin to set the output voltage level as shown in
Figure 6. This method is good for generating voltages up to
2.3V (with the REF voltage set to 1.5V).
For this case, the output voltage can be obtained as follows:
It is recommended to choose resistor values of less than
500
for R
S1
and R
P1
resistors in order to get better output
voltage DC accuracy.
FIGURE 4. SAMPLE AND HOLD TIMING
TIME
PWM
I
L
I
SEN
SWITCHING PERIOD
SAMPLING PERIOD
OLD SAMPLE
CURRENT
NEW SAMPLE
CURRENT
FIGURE 5. ISL8102 INTERNAL AND EXTERNAL CURRENT-
SENSING CIRCUITRY FOR CURRENT BALANCE
I
n
ISEN
IL
x
(
)
rRISEN
=
-
+
ISEN(n)
R
ISEN
SAMPLE
&
HOLD
ISL8102 INTERNAL CIRCUIT
EXTERNAL CIRCUIT
V
IN
CHANNEL N
UPPER MOSFET
CHANNEL N
LOWER MOSFET
-
IL
x
rDS ON
+
(
)
I
L
TABLE 1. ISL8102 DAC VOLTAGE SELECTION TABLE
REF1
REF0
DAC
0
0
0.600V
0
1
0.900V
1
0
1.200V
1
1
1.500V
I
n
I
L
----------------------
=
(EQ. 3)
V
OUT
V
REF
R
---------------------------------
R
+
(
)
P1
V
OFS
V
DROOP
–
+
=
(EQ. 4)
ISL8102
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| ISL8102CRZ | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:500kHz 占空比:100% 電源電壓:8.2 V ~ 30 V 降壓:無 升壓:無 回掃:是 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:0°C ~ 70°C 封裝/外殼:8-DIP（0.300"，7.62mm） 包裝:管件 產(chǎn)品目錄頁面:1316 (CN2011-ZH PDF) |
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