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參數(shù)資料
| 型號： | ISL76161AVZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 12-BIT HS D/A 28-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 位數(shù)： | 12 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 120mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 130M |
| 產(chǎn)品目錄頁面： | 1236 (CN2011-ZH PDF) |
4
FN6720.2
December 23, 2013
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage DVDD to DCOM . . . . . . . . . . . . . . . . . +4.0V
Analog Supply Voltage AVDD to ACOM. . . . . . . . . . . . . . . . . . +4.0V
Grounds, ACOM TO DCOM . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Digital Input Voltages (D9-D0, CLK, SLEEP) . . . . . . . . DVDD + 0.3V
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AVDD + 0.3V
Analog Output Current (IOUT) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Thermal Resistance (Typical, Note 3)
θJA(°C/W)
TSSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
84
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
3.
θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
AVDD = DVDD = +3.3V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = +25°C for All Typical Values; Parameters
with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
PARAMETER
TEST CONDITIONS
TA = -40°C TO +105°C
UNITS
MIN
TYP
MAX
SYSTEM PERFORMANCE
Resolution
12
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 9)
-1.25
±0.5
+1.25
LSB
Differential Linearity Error, DNL
(Note 9)
-1
±0.5
+1
LSB
Offset Error, IOS
IOUTA (Note 9)
-0.006
-
+0.006
% FSR
Offset Drift Coefficient
(Note 9)
-
0.1
-
ppm
FSR/°C
Full Scale Gain Error, FSE
With External Reference (Notes 4, 9)
-
±0.5
-
% FSR
With Internal Reference (Notes 4, 9)
-3
±0.5
+3
% FSR
Full Scale Gain Drift
With External Reference (Note 9)
-
±50
-
ppm
FSR/°C
With Internal Reference (Note 9)
-
±100
-
ppm
FSR/°C
Full Scale Output Current, IFS
RSET = 1.94kΩ (Maximum FS output)
-
20
-
mA
RSET = 20kΩ (Minimum FS output)
-
2
-
mA
Output Voltage Compliance - High
Voltage Limit
-1.25
-
V
Output Voltage Compliance - Low
Voltage Limit
--1.0
-
V
DYNAMIC CHARACTERISTICS
Maximum Clock Rate, fCLK
130
150
-
MHz
Output Rise Time
Full Scale Step
-
1.5
-
ns
Output Fall Time
Full Scale Step
-
1.5
-
ns
Output Capacitance
-10
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/
√Hz
IOUTFS = 2mA
-
30
-
pA/
√Hz
ISL76161
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