參數(shù)資料
型號(hào): ISL6740
廠商: Intersil Corporation
英文描述: Flexible Double Ended Voltage and Current Mode PWM Controllers
中文描述: 靈活的雙端電壓和電流模式PWM控制器
文件頁(yè)數(shù): 20/29頁(yè)
文件大小: 639K
代理商: ISL6740
20
formed by R13 and R15 determines the percent of maximum
duty cycle that corresponds to a short circuit. The divider
ratio formed by R13 and R15 is
Therefore, the duty cycle that corresponds to a short circuit
is 6.8% of D max (97.9%), or ~6.6%.
Performance
The major performance criteria for the converter are
efficiency, and to a lesser extent, load regulation. Efficiency,
load regulation and line regulation performance are
demonstrated in the following Figures.
As expected, the output voltage varies considerably with line
and load when compared to an equivalent converter with
closed loop feedback. However, for applications where tight
regulation is not required, such as those application that use
downstream DC-DC converters, this design approach is
viable.
Waveforms
Typical waveforms can be found in the following Figures.
Figure 13 shows the output voltage during start up.
Figure 14 shows the output voltage ripple and noise at a 5A
load.
Figures 15 and 16 show the voltage waveforms at the
switching node shared by the upper FET source and the lower
FET drain. In particular, Figure 16 shows near ZVS operation
at 8A of load when the upper FET is turning off and the lower
FET turning on. There is insufficient energy stored in the
leakage inductance to allow complete ZVS operation.
However, since the energy stored in the node capacitance is
proportional to V
2
, a significant portion of the energy is still
recovered. Figure 17 shows the switching transition between
outputs, OUTA and OUTB during steady state operation. The
deadtime duration of 48.6ns is clearly shown.
R15
-------------+
17.4k
---------------+
0.068
=
=
(EQ. 24)
FIGURE 10. EFFICIENCY vs LOAD V
IN
= 48V
t
LOAD CURRENT (A)
E
100
95
90
85
80
75
70
0
1
2
3
4
5
6
7
8
9
FIGURE 11. LOAD REGULATION AT V
IN
= 48V
LOAD CURRENT (A)
O
12.5
12.25
12
11.75
11.5
11.25
110
1
2
3
4
5
6
7
8
9
FIGURE 12. LINE REGULATION AT I
OUT
= 1A
INPUT VOLTAGE (V)
45
46
47
48
49
50
51
52
53
54
14
13.5
13
12.5
12
11.5
11
O
FIGURE 13. OUTPUT SOFT START
FIGURE 14. OUTPUT RIPPLE AND NOISE - 20MHz BW
ISL6740, ISL6741
相關(guān)PDF資料
PDF描述
ISL6740IB Flexible Double Ended Voltage and Current Mode PWM Controllers
ISL6740IV Octal Buffers/Drivers With 3-State Outputs 20-SSOP -40 to 85
ISL6741 Flexible Double Ended Voltage and Current Mode PWM Controllers(靈活的雙端電壓和電流模式PWM控制器)
ISL6845IB Improved Industry Standard Single Ended Current Mode PWM Controller
ISL6845 Improved Industry Standard Single Ended Current Mode PWM Controller
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ISL6740AIVZA-T 功能描述:IC REG CTRLR PWM VM 16-TSSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無(wú) 升壓:無(wú) 回掃:無(wú) 反相:無(wú) 倍增器:無(wú) 除法器:無(wú) Cuk:無(wú) 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC(0.154",3.90mm 寬) 包裝:帶卷 (TR)
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ISL6740EVAL2 功能描述:EVALUATION BOARD 2 ISL6740 RoHS:否 類別:編程器,開(kāi)發(fā)系統(tǒng) >> 過(guò)時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像,彩色(RGB) 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP
ISL6740EVAL2Z 功能描述:EVALUATION BOARD 2 ISL6740 RoHS:是 類別:編程器,開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - DC/DC 與 AC/DC(離線)SMPS 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:True Shutdown™ 主要目的:DC/DC,步升 輸出及類型:1,非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):升壓 頻率 - 開(kāi)關(guān):3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969