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參數(shù)資料
| 型號： | ISL6700IB |
| 廠商： | INTERSIL CORP |
| 元件分類： | 功率晶體管 |
| 英文描述： | 1024 x 9 x 2 Asynchronous Bidirectional FIFO Memory 64-TQFP 0 to 70 |
| 中文描述： | 1.4 A HALF BRDG BASED MOSFET DRIVER, PDSO8 |
| 封裝： | PLASTIC, MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 255K |
| 代理商： | ISL6700IB |
5
FN9077.6
December 29, 2004
GATE DRIVER OUTPUT PINS: LO & HO
Low Level Output Voltage
V
OL
I
OUT
= 0A
-
-
0.1
-
0.1
V
High Level Output Voltage
V
DD
-V
OH
I
OUT
= 0A
-
-
0.1
-
0.1
V
Peak Pullup Current
I
O
+
V
OUT
= 0V
-
1.4
-
-
-
A
Peak Pulldown Current
I
O
-
V
OUT
= 12V
-
1.3
-
-
-
A
Electrical Specifications
V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified
(Continued)
PARAMETERS
SYMBOL
TEST CONDITIONS
T
J
= 25°C
T
J
= -40°C TO
125°C
UNITS
MIN
TYP
MAX
MIN
MAX
Switching Specifications
V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified
PARAMETERS
SYMBOL
TEST
CONDITIONS
T
J
= 25°C
T
J
= -40°C
TO
125°C
UNITS
MIN
TYP
MAX
MIN
MAX
Lower Turn-off Propagation Delay
(LI Falling to LO Falling)
t
LPHL
-
45
50
-
65
ns
Upper Turn-off Propagation Delay
(HI Falling to HO Falling)
t
HPHL
-
60
75
-
90
ns
Lower Turn-on Propagation Delay
(LI Rising to LO Rising)
t
LPLH
-
75
82
-
95
ns
Upper Turn-on Propagation Delay
(HI Rising to HO Rising)
t
HPLH
-
70
75
-
95
ns
Deadtime, (t
HPLH
- t
LPHL
)
DHt
ON
LI, HI switched simultaneously
0
24
-
0
-
ns
Deadtime, (t
LPLH
- t
HPHL
)
DLt
ON
0
17
-
0
-
ns
Rise Time
t
R
-
5
20
-
25
ns
Fall Time
t
F
-
5
20
-
25
ns
Delay Matching: Lower Turn-On and Upper Turn-Off
t
MON
-
8
20
-
25
ns
Delay Matching: Lower Turn-Off and Upper Turn-On
t
MOFF
-
-15
25
-
30
ns
Pin Descriptions
SYMBOL
DESCRIPTION
V
DD
Positive supply to control logic and lower gate drivers. De-couple this pin to V
SS
. Connect anode of bootstrap diode to this pin.
HI
Logic level input that controls the HO output.
LI
Logic level input that controls the LO output.
V
SS
Chip negative supply, generally will be ground.
LO
Low-side output. Connect to gate of low-side power MOSFET.
HS
High-side source connection. Connect to source of high-side power MOSFET. Connect negative side of bootstrap capacitor to this
pin.
HO
High-side output. Connect to gate of high-side power MOSFET.
HB
High-side bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive
side of bootstrap capacitor to this pin.
EPAD
Exposed pad. Connect to ground or float. The EPAD is electrically isolated from all other pins.
ISL6700
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