參數(shù)資料
型號(hào): ISL6539CAZ-T
廠商: INTERSIL CORP
元件分類: 穩(wěn)壓器
英文描述: Wide Input Range Dual PWM Controller with DDR Option
中文描述: DUAL SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO28
封裝: ROHS COMPLIANT, PLASTIC, QSOP-28
文件頁數(shù): 15/20頁
文件大?。?/td> 503K
代理商: ISL6539CAZ-T
15
FN9144.4
June 6, 2005
a 75μA sourcing current. Users can tune the sourcing
current of the ISEN pin to meet the overcurrent protection
and the change the current loop gain. The lower the current
sensing resistor, the higher gain of the current loop, which
can damp the output LC filter more.
A higher current-sensing resistor will decrease the current
sense gain. If the phase node of the converter is very noisy
due to poor layout, the sensed current will be contaminated,
resulting in duty cycle jittering by the current loop. In such a
case, a bigger current sense resistor can be used to reduce
both real and noise current levels. This can help damp the
phase node waveform jittering.
Sometimes, if the phase node is very noisy, a resistor can be
put on the ISEN pin to ground. This resistor together with the
R
CS
can divide the phase node voltage down, seen by the
internal current sense amplifier, and reduce noise coupling.
Sizing the Overcurrent Setpoint Resistor
The internal 0.9V reference is buffered to the OCSET pin
with a voltage follower (refer to the equivalent circuit in
Figure 10). The current going through the external
overcurrent set resistor is sensed from the OCSET pin. This
current, divided by 2.9, sets up the overcurrent threshold and
compares with the scaled ISEN pin current going through
R
CS
with an 8μA offset. Once the sensed current is higher
than the threshold value, an OC signal is generated. The first
OC signal starts a counter and activates a pulse skipping
function. The inductor current will be continuously monitored
through the phase node voltage after the first OC trip. As
long as the sensed current exceeds the OC threshold value,
the following PWM pulse will be skipped. This operation will
be the same for 8 switching cycles. Another OC occurring
between 8 to 16 switching cycles would result in a latch off
with both upper and lower drives low. If there is no OC within
8 to 16 switching cycles, normal operation resumes.
Based on the previous description and functional block
diagram, the OC set resistor can be calculated as:
I
OC
is the inductor peak current and not the load current.
Since inductor peak current changes with input voltage, it is
better to use an oscilloscope when testing the overcurrent
setting point to monitor the inductor current, and to
determine when the OC occurs. To get consistent test results
on different boards, it is best to keep the MOSFET at a fixed
temperature.
The MOSFET will not heat-up when applying a very low
frequency and short load pulses with an electronic load to
the output.
As an example, assume the following:
the maximum normal operation load current is 1,
the OC set point is 10% higher than the maximum load
current,
the inductor peak current is 1.15-1.3 times higher than the
load current, depending on the inductor value and the
input voltage,
and the r
DSON
has a 45% increase at higher temperature.
I
OC
should set at least 1.8 to 2 times higher than the
maximum load current to avoid nuisance overcurrent trip.
Selection of the LC Filter
The duty cycle of a buck converter is a function of the input
voltage and output voltage. Once an output voltage is fixed,
it can be written as:
The switching frequency, F
sw
, of ISL6539 is 300kHz. The
peak-to-peak ripple current going through the inductor can
be written as:
As higher ripple current will result in higher switching loss
and higher output voltage ripple, the peak-to-peak current of
the inductor is generally designed with a 20%-40% peak-to-
peak ripple of the nominal operation current. Based on this
assumption, the inductor value can be selected with the
above equation. In addition to the mechanical dimension, a
shielded ferrite core inductor with a very low DC resistance,
DCR, is preferred for less core loss and copper loss. The DC
copper loss of the inductor can be estimated by:
+
_
REFERENCE
AMPLIFIER
Comparator
_
÷
2.9
Isense
I
SENSE
OC
OCSET
Rset
Rdson
r
_
+
140
R
CS
+
_
÷
33.1
8uA
PHASE
ISEN
0.9 V
+
+ +
FIGURE 10. EQUIVALENT CIRCUIT FOR OC SIGNAL
GENERATOR
R
set
CS
)
----------------+
8
μ
A
+
---------------------------------------------------
=
D V
IN
)
V
V
IN
---------------
=
I
pp
V
1
-------------------------------------------------
D V
)
(
F
sw
L
)
=
P
copper
I
load
DCR
2
=
ISL6539
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