參數(shù)資料
型號(hào): ISL6310
廠商: Intersil Corporation
英文描述: Two-Phase Buck PWM Controller with High Current Intergrated MOSFET Driver
中文描述: 兩相降壓PWM控制器,帶有高電流集成MOSFET驅(qū)動(dòng)器
文件頁數(shù): 24/27頁
文件大?。?/td> 711K
代理商: ISL6310
24
FN9209.2
October 19, 2005
Switching Frequency
There are a number of variables to consider when choosing
the switching frequency, as there are considerable effects on
the upper MOSFET loss calculation. These effects are
outlined in
MOSFETs
, and they establish the upper limit for
the switching frequency. The lower limit is established by the
requirement for fast transient response and small output-
voltage ripple as outlined in
Output Filter Design
. Choose the
lowest switching frequency that allows the regulator to meet
the transient-response requirements.
Switching frequency is determined by the selection of the
frequency-setting resistor, R
FS
. Figure 24 and Equation 33
are provided to assist in selecting the correct value for R
FS
.
[
=
Input Capacitor Selection
The input capacitors are responsible for sourcing the AC
component of the input current flowing into the upper
MOSFETs. Their RMS current capacity must be sufficient to
handle the ac component of the current drawn by the upper
MOSFETs which is related to duty cycle and the number of
active phases.
For a Two-phase design, use Figure 25 to determine the
input-capacitor RMS current requirement set by the duty
cycle, maximum sustained output current (I
O
), and the ratio
of the peak-to-peak inductor current (I
L,PP
) to I
O
. Select a
bulk capacitor with a ripple current rating which will minimize
the total number of input capacitors required to support the
RMS current calculated. The voltage rating of the capacitors
should also be at least 1.25 times greater than the maximum
input voltage. Figure 26 provides the same input RMS
current information for single-phase designs. Use the same
approach for selecting the bulk capacitor type and number.
Low ESL, high-frequency ceramic capacitors are needed in
addition to the input bulk capacitors to suppress leading and
falling edge voltage spikes. The spikes result from the high
current slew rate produced by the upper MOSFET turn on and
off. Place them as close as possible to each upper MOSFET
drain to minimize board parasitics and maximize suppression.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. These voltage
spikes can degrade efficiency, radiate noise into the circuit
and lead to device overvoltage stress. Careful component
layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turnoff
transition of the upper PWM MOSFET. Prior to turnoff, the
upper MOSFET was carrying channel current. During the
turnoff, current stops flowing in the upper MOSFET and is
picked up by the lower MOSFET. Any inductance in the
R
FS
10
10.61
1.035
FSW
(
)
log
]
(EQ. 33)
FIGURE 24. R
FS
vs SWITCHING FREQUENCY
100K
200K
SWITCHING FREQUENCY (Hz)
500K
1M
2M
R
F
)
10
20
50
100
200
FIGURE 25. NORMALIZED INPUT-CAPACITOR RMS
CURRENT FOR 2-PHASE CONVERTER
0.3
0.1
0
0.2
I
R
I
O
)
0
0.4
1.0
0.2
0.6
0.8
DUTY CYCLE (V
IN/
V
O
)
I
L,PP
= 0
I
L,PP
= 0.5 I
O
I
L,PP
= 0.75 I
O
FIGURE 26. NORMALIZED INPUT-CAPACITOR RMS
CURRENT FOR SINGLE-PHASE CONVERTER
0
0.4
1.0
0.2
0.6
0.8
DUTY CYCLE (V
IN
/V
O
)
I
R
/
O
)
0.6
0.2
0
0.4
I
L,PP
= 0
I
L,PP
= 0.5 I
O
I
L,PP
= 0.75 I
O
ISL6310
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