
3
FN9171.1
Absolute Maximum Ratings
Thermal Information
(PVCC, VCC, LVCC) to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
PHASE to PGND . . . . . . . . . . . . . . . . . . . . . .-0.3V to (PVCC +0.3V)
PGND to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V
All other pins to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to 7V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7). . . . .2kV
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . .-25°C to 85°C
Supply Voltage (PVCC, VCC) . . . . . . . . . . . . . . . . . . . . 2.76 to 5.5V
Supply Voltage (LVCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7 - 5.5V
Thermal Resistance. . . . . . . . . . . . . . . . .
θ
JA
(°C/W)
4x4 QFN Package (Notes 1, 2) . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . .150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300°C
θ
JC
(°C/W)
7.5
45
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features (TB379).
2. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Operating Conditions, Unless Otherwise Noted; T
= -25°C to 85°C, PVCC = VCC = 3.7V. Component values
as shown in Figure 19, Typical Application Circuit: Vout = 1.6V, I
OUT
= 0mA
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
CORE BUCK REGULATOR
Input Voltage Range
(After V
CC
reaches Rising V
POR
)
PV
CC
PV
CC
= V
CC
2.76
5.5
V
Output Voltage Nominal Range
VOUT
Programmable in 50mV increments
0.85
1.60
V
Max. DC Output Current
Icore
(Note 3)
800
mA
Current Limit (DC plus Ripple)
Icore_lim
(wafer level test only)
950
1300
mA
PMOS on Resistance
r
DS(ON)p
Iout = 200mA
275
m
NMOS on Resistance
r
DS(ON)n
Iout = 200mA
140
m
Frequency (Note 4)
f
Vin = 3.7V, Vo = 1.0V, VF6 = 0.9V
1.2
MHz
Load Regulation
VOUT = 1.6V; Io = 1mA-500mA
.05
1
%
Line Regulation
Over VCC range
1
%
VOUT Pk-Pk Ripple
V
P-P
Vout = 1.6V, I = 0.4A, CCM
5
mV
Discontinous Mode Operation
10
mV
System Accuracy
Over Temperature
-1
2
%
Room Temperature
-1
1
%
Under Voltage Threshold (Note 5)
Rising, as % of nominal VOUT
94
%
Falling, as % of nominal VOUT
86
%
Over Voltage threshold
Rising, as % of nominal VOUT
114
%
Falling, as % of nominal VOUT
106
%
Start-up Time
t
st
From Enable Active @ Io = 10mA; Vo = 1.6V
1.3
ms
Ring Damping Switch Resistance
R
on(RD)
50
75
LINEAR REGULATORS
Input Voltage
LVCC
Connected to PVCC
2.76
5.5
V
Not connected to PVCC
1.70
3.5
V
Output Voltage
VSRAM
1.1
V
VPLL
1.3
V
ISL6271A