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參數(shù)資料
| 型號(hào)： | ISL6174IRZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 5/16頁 |
| 文件大小： | 346K |
| 描述： | IC CIRC BREAKER DUAL LV 28-QFN |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 類型： | 熱交換控制器 |
| 應(yīng)用： | 通用 |
| 內(nèi)部開關(guān)： | 無 |
| 電源電壓： | 2.25 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 28-QFN 裸露焊盤（5x5） |
| 包裝： | 管件 |
5
FN6830.0
December 19, 2008
Absolute Maximum Ratings
Thermal Information
VBIAS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V
GTx, CPQ+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +12V
ENx
, SNSx, PGx
, FLTx, VSx, TCBx, UVx,
SSx, CPQ-, CPVDD. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5VDC
Output Current . . . . . . . . . . . . . . . . . . . . . . .Short Circuit Protected
Thermal Resistance (Typical, Notes 1, 4) ?/DIV>
JA
(癈/W) ?/DIV>
JC
(癈/W)
5x5 QFN Package . . . . . . . . . . . . . . . .
42
12.5
Maximum Storage Temperature Range. . . . . . . . . .-65癈 to +150癈
For recommended soldering conditions, see Tech Brief TB389.
(QFN - Leads Only)
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
VBIAS / VIN1 Supply Voltage Range. . . . . . . . . . . +2.25V to +3.63V
Temperature Range (T
A
)
-40癈 to +85癈
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. ?/DIV>
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with direct attach features. See
Tech Brief TB379.
2. All voltages are relative to GND, unless otherwise specified.
3. 1V (min) on the BIAS pin required for FLT
to be valid.
4. For ?/DIV>
JC
, the case temp location is the center of the exposed metal pad on the package underside..
Electrical Specifications V
DD
= 2.5V to +3.3V, V
S
= 1V,T
A
= T
J
= -40癈 to +85癈, Unless Otherwise Specified. Parameters with MIN
and/or MAX limits are 100% tested at +25癈, unless otherwise specified.
Temperature limits established by characterization and are not production tested.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CIRCUIT BREAKER CONTROL
ISET Current
I
SET
R
OCREF
= 14.7k?/SPAN>
19
20
21
礎(chǔ)
Over Current Comparator Offset Voltage
Vio
V
VS
- V
SNS
with I
OUT
= 0A
-1.25
-0.05
1.25
mV
Circuit Breaker Threshold Voltage
V
CRVTH
V
VS
- V
SNS
at FLT
assertion,
R
ISET
= 1.0k, I
SET
= 20礎(chǔ)
19.7
mV
TCB Threshold Voltage
V
CT_Vth
Peak Voltage
1.128
1.178
1.202
V
TCB Charging Current
I
CT
9
10
11
礎(chǔ)
TCB Default Delay
T
CT
TCB = Open
3
祍
GATE DRIVE
GATE Response Time from WOC (Open)
pd_woc_open
GATE open
100mV of overdrive on the WOC
comparator
3
ns
GATE Response Time from WOC
(Loaded)
pd_woc_load
GATE = 1nF
100mV of overdrive on the WOC
comparator
100
ns
GATE Turn-On Current
IGATE_on
GATE = 2V, V
VS
= 2V, V
SNS
= 2.1V
21
24
27
礎(chǔ)
GATE Turn-Off Current
IGATE_off
OC or WOC Turn-off Gate Current
100
mA
GATE Voltage
V
GATE
Bias = 2.5V (Figure 5, 6)
8.2
8.8
9.3
V
2.1 < Bias < 2.5 (Figure 5, 6)
7
V
BIAS
Supply Current
I
BIAS
V
BIAS
= 3.3V
6
9.3
12
mA
POR Rising Threshold
VIN_POR_L2H
1.85
2.02
2.12
V
POR Falling Threshold
VIN_POR_H2L
1.80
1.98
2.10
V
POR Threshold Hysteresis
VIN_POR_HYS
5
33
mV
ISL6174
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