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參數(shù)資料
| 型號： | ISL59921IRZ-T7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ANLG VID LINE TRPL 20-QFN |
| 標準包裝： | 1,000 |
| 類型： | 視頻延遲線 |
| 應用： | RGB 視頻信號 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-VQFN 裸露焊盤 |
| 供應商設備封裝： | 20-QFN 裸露焊盤（5x5） |
| 包裝： | 帶卷 (TR) |
3
FN6826.2
August 31, 2010
tR - tF
Transient Response Time
ISL59920, 20% to 80%, for any delay, 1V step
delay = 0ns
1.7
ns
ISL59921, 20% to 80%, for any delay, 1V step
delay = 0ns
1.6
ns
ISL59922, 20% to 80%, for any delay, 1V step
delay = 0ns
1.43
ns
ISL59923, 20% to 80%, for any delay, 1V step
delay = 0ns
1.7
ns
VOVER
Voltage Overshoot
For any delay, response to 1V step input
4
%
Settling Time
Output Settling after Delay Change / Offset
Calibration
Output settling time from rising edge of
SENABLE
3s
THD
Total Harmonic Distortion
1VP-P 10MHz sinewave, offset by +0.2V at
mid delay setting
-43
-38
dB
X
Crosstalk
Stimulate G, measure R/B at 1MHz,
ISL59920, ISL59921, ISL59923
-80
-63
dB
ISL59922
-78
-59
dB
VN
Output Noise
Bandwidth = 150MHz
2
mVRMS
G_0
Gain Zero Delay
1.74
1.8
1.92
V/V
G_m
Gain Mid Delay
1.67
1.8
1.97
V/V
G_f
Gain Full Delay
1.6
1.8
2
V/V
DG_m0
Difference in Gain, 0 to Mid
-8
0.6
7.5
%
DG_f0
Difference in Gain, 0 to Full
-12
-1.8
10
%
DG_fm
Difference in Gain, Mid to Full
-10
-1.7
7.5
%
VIN
Input Voltage Range
ISL59920, Gain remains > 90% of nominal,
Gain = 2
-0.7
1.1
V
ISL59921, Gain remains > 90% of nominal,
Gain = 2
-0.7
1.04
V
ISL59922, Gain remains > 90% of nominal,
Gain = 2
-0.7
1.04
V
ISL59923, Gain remains > 90% of nominal,
Gain = 2
-0.7
1.15
V
IB
RIN, GIN, BIN Input Bias Current
ISL59920, ISL59921
3
6
8
A
ISL59922, ISL59923
1.5
8
A
VOS
Output Offset Voltage
Post offset calibration (Note 4), Delay = 0ns
and Delay = Full
-25
-4
+20
mV
ZOUT
Output Impedance
ISL59920, ISL59921, Enabled,
Chip enable = 5V
4.5
5.4
6.3
Ω
ISL59922, ISL59923, Enabled,
Chip enable = 5V
3.5
6.3
Ω
Disabled, Chip enable = 0V
8
M
Ω
+PSRR
Rejection of Positive Supply
-42
-29
dB
-PSRR
Rejection of Negative Supply
-58
-46
dB
IOUT
Output Drive Current
10
Ω load, 0.5V drive
43
53
70
mA
VIH
Logic High
Switch high threshold
1.6
V
VIL
Logic Low
Switch low threshold
0.8
V
Electrical Specifications
VSP = VSPO = +5V, VSM = VSMP = -5V, GAIN = 2, TA = +25°C, exposed die plate = -5V, x2 = 5V,
RLOAD = 150Ω on all video outputs, unless otherwise specified. (Continued)
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP MAX
UNIT
ISL59920, ISL59921, ISL59922, ISL59923
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ISL59922 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Analog Video Delay Lines |
| ISL59922IRZ | 功能描述:視頻 IC ISL95871C INTEGRTD FET CO-PACK BATRY CH RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| ISL59922IRZ-EVALZ | 制造商:Intersil Corporation 功能描述:ISL59922IRZ-EVALZ (PB-FREE ) EVALUATION BOARD - ROHS COMPLIA - Bulk |
| ISL59922IRZ-T7 | 功能描述:視頻 IC ISL95871C INTEGRTD FET CO-PACK BATRY CH RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| ISL59923 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Analog Video Delay Lines |
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