DIGITAL INPUTS D9-D0, CLK Input Logic High Voltage with 3.3V Supply, VIH (Note 3) 2.3 3.3 - V Inp" />
參數(shù)資料
型號(hào)： ISL5727IN
廠商： Intersil
文件頁數(shù)： 11/13頁
文件大?。?/td> 0K
描述： IC DAC DUAL 10BIT 260MSPS 48LQFP
標(biāo)準(zhǔn)包裝： 250
位數(shù)： 10
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 275 mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 管件
輸出數(shù)目和類型： 4 電流，單極
采樣率（每秒）： 260M
7
DIGITAL INPUTS D9-D0, CLK
Input Logic High Voltage with
3.3V Supply, VIH
(Note 3)
2.3
3.3
-
V
Input Logic Low Voltage with
3.3V Supply, VIL
(Note 3)
-
0
1.0
V
Sleep Input Current, IIH
-25
-
+25
A
Input Logic Current, IIH, IL
-20
-
+20
A
Clock Input Current, IIH, IL
-10
-
+10
A
Digital Input Capacitance, CIN
-3
-
pF
TIMING CHARACTERISTICS
Data Setup Time, tSU
See Figure 15
-
1.5
-
ns
Data Hold Time, tHLD
See Figure 15
-
1.5
-
ns
Propagation Delay Time, tPD
See Figure 15
-
1
-
Clock
Period
CLK Pulse Width, tPW1, tPW2
See Figure 15 (Note 3)
2
-
ns
POWER SUPPLY CHARACTERISTICS
AVDD Power Supply
(Note 9)
2.7
3.3
3.6
V
DVDD Power Supply
(Note 9)
2.7
3.3
3.6
V
Analog Supply Current (IAVDD)
3.3V, IOUTFS = 20mA
-
60
62
mA
3.3V, IOUTFS = 2mA
-
24
-
mA
Digital Supply Current (IDVDD)
3.3V (Note 5)
-
11
15
mA
3.3V (Note 6)
-
17
21
mA
Supply Current (IAVDD) Sleep Mode
3.3V, IOUTFS = Don’t Care
-
5
-
mA
Power Dissipation
3.3V, IOUTFS = 20mA (Note 5)
-
233
255
mW
3.3V, IOUTFS = 20mA (Note 6)
-
253
274
mW
3.3V, IOUTFS = 20mA (Note 7)
-
275
-
mW
3.3V, IOUTFS = 2mA (Note 5)
-
115
-
mW
Power Supply Rejection
Single Supply (Note 8)
-0.125
-
+0.125
%FSR/V
NOTES:
2. Gain Error measured as the error in the ratio between the full scale output current and the current through RSET (typically 625A). Ideally the
ratio should be 32.
3. Parameter guaranteed by design or characterization and not production tested.
4. Spectral measurements made with differential transformer coupled output and no external filtering. For multitone testing, the same pattern was
used at different clock rates, producing different output frequencies but at the same ratio to the clock rate.
5. Measured with the clock at 130MSPS and the output frequency at 10MHz.
6. Measured with the clock at 200MSPS and the output frequency at 20MHz.
7. Measured with the clock at 260MSPS and the output frequency at 40.4MHz.
8. See Definition of Specifications.
9. Recommended operation is from 3.0V to 3.6V. Operation below 3.0V is possible with some degradation in spectral performance. Reduction in
analog output current may be necessary to maintain spectral performance.
10. See Typical Performance plots.
Electrical Specifications
AVDD = DVDD = +3.3V, VREF = Internal 1.2V, IOUTFS = 20mA, TA = 25°C for All Typical Values (Continued)
PARAMETER
TEST CONDITIONS
TA = -40°C TO 85°C
UNITS
MIN
TYP
MAX
ISL5727
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