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參數(shù)資料
| 型號： | ISL55111 |
| 廠商： | Intersil Corporation |
| 英文描述： | Dual, High Speed MOSFET Driver |
| 中文描述： | 雙路，高速MOSFET驅(qū)動器 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 313K |
| 代理商： | ISL55111 |
12
FN6228.1
March 21, 2007
Detailed Description
The ISL55110 and ISL55111 are Dual High Speed Mosfet
Drivers intended for applications requiring accurate pulse
generation and buffering. Target applications include
Ultrasound, CCD Imaging, Automotive Piezoelectric
distance sensing and clock generation circuits.
With a wide output voltage range and low On Resistance,
these devices can drive a variety of resistive and capacitive
loads with fast rise and fall times, allowing high speed
operation with low skew as required in large CCD array
imaging applications.
The ISL55110 and ISL55111 are compatible with 3.3V and
5V logic families and incorporate tightly controlled input
thresholds to minimize the effect of input rise time on output
pulse width. The ISL55110 has a pair of in-phase drivers
while the ISL55111 two drivers operating in antiphase. Both
inputs of the device have independent inputs to allow
external time phasing if required.
In addition to power MOS drivers, the ISL55110, ISL55111 is
well suited for other applications such as bus, control signal,
and clock drivers on large memory of microprocessor
boards, where the load capacitance is large and low
propagation delays are required. Other potential applications
include peripheral power drivers and charge-pump voltage
inverters.
Input Stage
The input stage is a high impedance input with rise/fall
hysteresis. This means that the inputs will be directly
compatible with both TTL and lower voltage logic over the
entire VDD range. The user should treat the inputs as high
speed pins and keep rise and fall times to <2ns.
Output Stage
The ISL55110, ISL55111 output is a high-power CMOS
driver, swinging between ground and VH. At VH = 12V, the
output impedance of the inverter is typically 3.0
Ω
. The high
peak current capability of the ISL55110, ISL55111 enables it
to drive a 330pF load to 12V with a rise time of <3.0ns over
the full temperature range. The output swing of the
ISL55110, ISL55111 comes within < 30mV of the VH and
Ground rails.
Application Notes
Although the ISL55110, ISL55111 is simply a dual level-
shifting driver, there are several areas to which careful
attention must be paid.
Grounding
Since the input and the high current output current paths
both include the ground pin, it is very important to minimize
and common impedance in the ground return. Since the
ISL55111 has one inverting input, any common impedance
will generate negative feedback, and may degrade the delay,
rise and fall times. Use a ground plane if possible, or use
separate ground returns for the input and output circuits. To
minimize any common inductance in the ground return,
separate the input and output circuit ground returns as close
to the ISL55110, ISL55111 as is possible.
Bypassing
The rapid charging and discharging of the load capacitance
requires very high current spikes from the power supplies. A
parallel combination of capacitors that has a low impedance
over a wide frequency range should be used. A 4.7
μ
F
tantalum capacitor in parallel with a low inductance 0.1
μ
F
capacitor is usually sufficient bypassing.
Output Damping
Ringing is a common problem in any circuit with very fast
rise or fall times. Such ringing will be aggravated by long
inductive lines with capacitive loads. Techniques to reduce
ringing include:
1. Reduce inductance by making printed circuit board traces
as short as possible.
2. Reduce inductance by using a ground plane or by closely
coupling the output lines to their return paths.
3. Use small damping resistor in series with the output of the
ISL55110, ISL55111. Although this reduces ringing, it will
also slightly increase the rise and fall times.
4. Use good by passing techniques to prevent supply volt-
age ringing.
Power Dissipation Calculation
The Power dissipation equation has three components:
Quiescent Power Dissipation, Power dissipation due to
Internal Parasitics and Power Dissipation because of the
Load Capacitor.
Power dissipation due to internal parasitics is usually the
most difficult to accurately quantitize. This is primarily due to
Crow-Bar current which is a product of both the high and low
drivers conducting effectively at the same time during driver
transitions. Design goals always target the minimum time for
this condition to exist. Given that how often this occurs is a
product of frequency, Crowbar effects can be characterized
as internal capacitance.
Lab tests are conducted with Driver Outputs disconnected
from any load. With design verification packaging, bond
wires are removed to aid in the characterization process.
Base on laboratory tests and simulation correlation of those
results, the following equation defines the ISL55110,
ISL55111 Power Dissipation per channel:
P = VDD*3.3e-3 + 10pF*VDD^2*f + 135pF*VH^2*f +
CL*VH^2*f (Watts/Channel)
ISL55110, ISL55111
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