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參數(shù)資料
| 型號： | ISL55100BIRZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC COMP DRVR/WINDOW 18V 72-QFN |
| 標準包裝： | 30 |
| 類型： | 收發(fā)器 |
| 驅(qū)動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | LVDS |
| 電源電壓： | 15 V ~ 18 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 72-QFN-EP（10x10） |
| 包裝： | 管件 |
4
FN6229.1
November 24, 2008
Absolute Maximum Ratings
Thermal Information
VCC to VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 19V
VEXT to VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
Input Voltages
DATA, DRV EN, CVX, VH, VL, VINP, COMPX, LOWSWING
. . . . . . . . . . . . . . . . . . . . . . . . . . . . (VEE - 0.5V) to (VCC + 0.5V)
Output Voltages
DOUT . . . . . . . . . . . . . . . . . . . . . . . (VEE - 0.5V) to (VCC + 0.5V)
QX . . . . . . . . . . . . (COMP LOW - 0.5V) to (COMP HIGH + 0.5V)
Thermal Resistance (Typical, Notes 1, 2)
θ
JA (°C/W)
θ
JC (°C/W)
72 Ld QFN Package. . . . . . . . . . . . . . .
23
2.0
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
θ
JA is measured in free air with the component mounted on high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379 and Tech Brief TB389 for details. Device temperature is closely tied to data-rates, driver loads and overall pin activity. Review
“Power Dissipation Considerations” on page 9 for more information.
2. For
θ
JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Recommended Operating Conditions
PARAMETER
SYMBOL
MIN
(Note 9)
TYP
MAX
(Note 9)
UNITS
Device Power-(VEXT = VEE) VEXT not used
VCC - VEE
12 (Note 6)
15
18
V
Device Power-(VEXT = VEE + 5.5V)
VCC - VEE
9 (Note 6)
15
18
V
VEXT Optional External Logic Power
VEXT - VEE
5.5 (Note 6)
5.75
6.0
V
Driver Output High Rail
VH
VEE + 1
-
VCC - 0.5
V
Driver Output Low Rail
VL
VEE + 0.5
-
VEE + 6
V
Comparator Output High Rail
COMP-High
VEE + 1
-
VCC - 0.5
V
Comparator Output Low Rail
COMP-Low
VEE + 0.5
-
VEE + 6
V
Ambient Temperature
TA
-40
-
+85
°C
Junction Temperature
TJ
-
+150
°C
Electrical Specifications
Test Conditions: VCC = 12V, VEE = -3V, VH = 6V, VL = 0V, Comp-High = 5V, Comp Low = 0V, VEXT = VEE and
LOWSWING = VCC, +25°C; Unless Otherwise specified.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER DC CHARACTERISTICS
ISL55100B Output Resistance
ROUTD
IO = ±125mA, data not toggling
6
9
14
Ω
ISL55100B DC Output Current
Iout D
Per Individual driver
±125
-
mA
ISL55100B AC Output Current (Note 3)
IOUTDAC Per Individual driver
-
600
-
mA
ISL55100A Minimum Output Swing
VOMIN
VH = 200mV, VL = 0V
185
-
mV
Disabled HIZ Leakage Current
HIZ
VOUT = VCC with VH = VL + VEE or
VOUT = VEE with VH = VL = VCC
-1
0
1
A
DRIVER TIMING CHARACTERISTICS
Data
± to DOUT Propagation Delay
tPD
Lowswing Disabled (Note 5)
5
12
16
ns
Lowswing Enabled (Note 5)
6
13
17
ns
Driver Timing Skew, All Edges (Note 3)
-
<1
-
ns
Disable (HIZ) Time
tDIS
DVREN± Transition from Enable to
Disable
15
18
26
ns
Enable Time
tEN
DVREN± Transition from Disable to
Enable: Lowswing Disabled (Note 5)
13
15
23
ns
DVREN± Transition from Disable to
Enable: Lowswing Enabled (Note 5)
13
18
23
ns
ISL55100B
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