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參數(shù)資料
| 型號(hào)： | ISL5416 |
| 廠商： | Intersil Corporation |
| 英文描述： | Four-Channel Wideband Programmable DownConverter |
| 中文描述： | 四通道可編程寬帶下變頻器 |
| 文件頁(yè)數(shù)： | 32/71頁(yè) |
| 文件大?。?/td> | 2013K |
| 代理商： | ISL5416 |
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32
Tables of Top Level Registers
In the tables below “reset state” indicates the register
contents after a HW reset or a SW hard reset. Unless
noted, a soft channel reset does not clear register
contents. A soft channel reset does clear the slave
registers of a master/slave pair (such as channel data
path control) but does not clear the master.
This register controls the output SYNC signal polarity, the
output clock rate and polarity, output data modes, and
channel cascading.
TABLE 15. COMMON OUTPUT CONTROL FUNCTIONS (GWA = 0000h)
RESET STATE = 0x00000001h
P(31:0)
FUNCTION
31
ENABLE SERIAL OUTPUT.
1 = serial output mode is enabled. The DOUT parallel data bus is replaced with 4 serial output busses -- one per channel. See 0*06h
- 0*08h and Table 30.
30
RESERVED. Set to 0.
29
SCLK RESET.
1 = serial clock divider is reset by SYNCInX if the reset serial output bit is set in IWA = *000h, bits 13 or 29 of any of the 4 channels.
28
SCLK POLARITY.
1 = Low to High transitions at the center of the data bit.
0 = High to Low transitions at the center of the data bit.
27:25
SCLK RATE.
000 = SCLK DIsabled.
001 = input clock rate.
010 = input clock rate / 2.
011 = input clock rate / 4.
100 = input clock rate / 8.
101 = input clock rate /16.
24:21
RESERVED. Set to 0.
20
ROUTE CHANNEL 2 TO CHANNEL 3.
1 = route the output of FIR2 of channel 2 to the input of the CIC to FIR1 gain block in channel 3.
19
ROUTE CHANNEL 1 TO CHANNEL 2.
1 = route the output of FIR2 of channel 1 to the input of the CIC to FIR1 gain block in channel 2.
18
ROUTE CHANNEL 0 TO CHANNEL 1.
1 = route the output of FIR2 of channel 0 to the input of the CIC to FIR1 gain block in channel 1.
17
CHANNEL 0 EXTERNAL AGC SOURCE SELECT.
0 = when bit 14 is set, Channel 1 controls Channel 0 gain.
1 = when bit 14 is set, Channel 3 controls Channel 0 gain.
16
CHANNEL 2 EXTERNAL/INTERNAL GAIN CONTROL.
1 = Channel 2 gain is controlled by Channel 3.
15
CHANNEL 1 EXTERNAL/INTERNAL GAIN CONTROL.
1 = Channel 1 gain is controlled by Channel 3.
14
CHANNEL 0 EXTERNAL/INTERNAL GAIN CONTROL.
1 = Channel 0 gain is controlled by Channel 3 or Channel 1 depending on the state of bit 17.
13
CLKO2 OR INTRPT.
1 = CLKO2/INTRPT is INTRPT (2 clock period wide pulse).
0 = CLKO2/INTRPT is CLKO2.
NOTE: For INTRPT IWA = 0*0Ah, bit 31 must be set for the channel that is the interrupt source..
12
FSYNCX POLARITY.
0 = active high
1 = active low.
ISL5416
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PDF描述 |
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| ISL5416EVAL | Four-Channel Wideband Programmable DownConverter |
| ISL5416KI | Four-Channel Wideband Programmable DownConverter |
| ISL54205A | MP3/USB 2.0 High Speed Switch with Negative Signal Handling |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL5416_04 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Four-Channel Wideband Programmable DownConverter |
| ISL5416EVAL | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Four-Channel Wideband Programmable DownConverter |
| ISL5416EVAL1 | 功能描述:EVALUATION PLATFORM FOR ISL5416 RoHS:是 類別:RF/IF 和 RFID >> RF 評(píng)估和開發(fā)套件，板 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關(guān)產(chǎn)品:- 已供物品:模塊 其它名稱:SER3796 |
| ISL5416KI | 功能描述:上下轉(zhuǎn)換器 QUAD WIDEBAND DOWN CONVERTER, 256 CABGA RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| ISL5416KIZ | 制造商:Intersil Corporation 功能描述:LEAD-FREE QUAD WIDEBAND DOWN CONVERTER, 256 CABGA - Trays 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL QUAD DIGITAL DOWNCONVER 制造商:Intersil 功能描述:QD WIDEB& DWN CNVRTR 256 CABGA |
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