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參數(shù)資料
| 型號： | ISL54105ACRZ-EVALZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/16頁 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR ISL54105ACRZ |
| 標準包裝： | 1 |
| 系列： | * |
15
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FN6716.0
June 4, 2008
FIGURE 18. CONFIGURATION REGISTER READ
A0
A7
A2
A4
A3
A1
A6
A5
R/W
ISL54105A Register Address Write
This sets the initial address of the ISL54105A’s configuration
register for subsequent reading.
ISL54105A Serial Bus
START Command
Signals the beginning of serial I/O
ISL54105A Serial Bus Address Write
This is the same 7-bit address that was sent previously, however
the R/W bit is now a 1, indicating that the next transaction(s) will
be a read.
D7
D6
D5
D2
D4
D3
D1
D0
ISL54105A Register Data Read(s)
This is the data read from the ISL54105A’s configuration register.
Note: The ISL54105A’s Configuration Register’s address pointer
auto increments after each data read: repeat this step to read
multiple sequential bytes of data from the Configuration Register.
R/W
ISL54105A Serial Bus
START Command
STOP Command
(Repeat if desired)
Ends the previous transaction and starts a new one
Signals the ending of serial I/O
S
T
A
R
T
S
T
O
P
Data
Read*
SDA Bus
Signals from
the
Signals from
the Host
Register
Address
Serial Bus
Address
A
C
K
AAAAAAAA
A
C
K
dddddddd
A
C
K
aaaaaaa0
* The data read step may be repeated to read
from the ISL54105A’s Configuration Register
sequentially, beginning at the Register
Address written in the two steps previous.
R
E
S
T
A
R
T
Serial Bus
Address
A
C
K
aaaaaaa1
ISL54105A Device Select Address Write
The first 7 bits of the first byte select the ISL54105A on the 2-
wire bus at the address set by the ADDR[6:0} pins. R/W = 0,
indicating that the next transaction will be a write.
0
ADDR1 ADDR0
ADDR3 ADDR2
ADDR5 ADDR4
ADDR6
1
ADDR1 ADDR0
ADDR3 ADDR2
ADDR5 ADDR4
ADDR6
ISL54105A
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