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參數(shù)資料
| 型號(hào)： | ISL54100AHDMI-EVALZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 9/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR ISL54100AHDMI |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
17
FN6725.0
June 17, 2008
Minimize capacitance on all TMDS lines. The lower the
capacitance, the sharper the rise and fall times.
Maintain a constant, solid ground (or power) plane under
the 3 high speed TMDS signals. Do not route the signals
over gaps in the ground plane or over other traces.
Ideally each supply should be bypassed to ground with a
0.1F capacitor. Minimize trace length and vias to
minimize inductance and maximize noise rejection.
Figure 12 demonstrates a common but non-ideal PCB
layout and its equivalent circuit. The additional trace
resistance between the bypass capacitor and the power
supply/IC reduces its effectiveness. Figure 13
demonstrates a better layout. In this case there is still
series trace resistance (it is impossible to completely
eliminate it), but now it is being put to good use, as part of
a “T” filter, attenuating supply noise before it gets to the IC,
and reducing the amount of IC-generated noise that gets
injected into the supply. Follow the good supply bypassing
rules shown in Figure 13 to the extent possible.
ISL5410xA Serial Communication
Overview
The ISL5410xA uses a 2-wire serial bus for communication
with its host. SCL is the Serial Clock line, driven by the host
and SDA is the Serial Data line, which can be driven by all
devices on the bus. SDA is open drain to allow multiple
devices to share the same bus simultaneously.
Communication is accomplished in three steps:
1. The Host selects the ISL5410xA it wishes to
communicate with.
2. The Host writes the initial ISL5410xA Configuration
Register address it wishes to write to or read from.
3. The Host writes to or reads from the ISL5410xA’s
Configuration Register. The ISL5410xA’s internal
address pointer auto increments, so to read registers
0x00 through 0x1B, for example, one would write 0x00 in
step 2, then repeat step three 28 times, with each read
returning the next register value.
CBYPASS
RTRACE
V
+
RTRACE
IC
V
+
GND
GROUND PLANE
POWER PLANE
CBYPASS
IC
V
+
GND
VIAS
TO
GND
VIA TO
POWER
PLANE
EQUIVALENT CIRCUIT
RVIA
FIGURE 12. SUB-OPTIMAL BYPASS CAPACITOR LAYOUT
FIGURE 13. OPTIMAL (“T”) BYPASS CAPACITOR LAYOUT
CBYPASS
RTRACE
V
+
RTRACE
IC
V
+
GND
GROUND PLANE
CBYPASS
IC
V
+
GND
VIAS
TO
GND
VIA TO
POWER
PLANE
EQUIVALENT CIRCUIT
POWER PLANE
RVIA
ISL54100A, ISL54101A, ISL54102A
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| ISL54100CQZ | 功能描述:IC REGENERATOR TMDS 4:1 128-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標(biāo)準(zhǔn)包裝:1 系列:- 應(yīng)用:2 通道 I²C 多路復(fù)用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| ISL54100CQZ-EVAL | 制造商:Intersil Corporation 功能描述:ISL54100CQZ-EVAL EVALUATION BOARD - Bulk |
| ISL54100CQZ-EVALZ | 制造商:Intersil Corporation 功能描述:EVAL BD FOR ISL54100 TMDS REGENERATORS W/ MLTPLXRS - Bulk |
| ISL54100-EVM | 制造商:Intersil Corporation 功能描述:An Evaluation Board of Manual, automatic and infrared remote control,4:1 HDMI interface, and a CD of development files 制造商:Intersil Corporation 功能描述:An Evaluation Board of Manual, automatic and infrared remote control4:1 HDMI interface, and a CD of development files |
| ISL54100HDMI-EVALZ | 制造商:Intersil Corporation 功能描述:ISL54100HDMI EVALUATION BOARD, ROHS, 4HDMI IN, 1 HDMI OUT - Bulk |
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