
6
FN6158.2
October 13, 2006
Table 1 gives the calculated value of VOUT for resistors
values of: R
SET
= 24.9k
, R1 = 200k
, R2 = 243k
, and
V
ADD
= 10V.
TABLE 1. CALCULATED VCOM OUTPUT VOLTAGES
R
SET
Resistor
The external R
SET
resistor sets the full-scale sink current
that determines the lowest voltage of the external voltage
divider R
1
and R
2
(Figure 1). The maximum I
SET
current has
to be less than 120
μ
A. The minimum R
SET
resistor with
A
VDD
equal to 10V is 4.17k
(10V/(20*120
μ
A). Typical
applications with A
VDD
equal to 10V and R
SET
equal to
24.9k
will result in a set current equal to 20
μ
A.
Power Supply Sequence
The recommendation for power supply sequence would be
to power down the part first (Vdd, AVdd), after 100msec if
programming has occurred, and then power down the
control power supplies (CTL, CE).
Verifying the Programmed Value
The following sequence can be used to verify the
programmed value without having to sequence the V
DD
supply. To verify the programmed value, follow the steps
below. The ISL45042A will read memory contents and be set
to that value when the CE pin is grounded.
1. Power up the ISL45042A.
2. CE pin = V
DD.
3. Change counter value with CTL pin to desired value.
4. CTL = more than 4.9V and 200ms. Counter value
programmed.
5. Change the counter value with CTL pin to a different
value.
6. CE pin = Ground.
7. Check that the output value is the one programmed in
step #4.
Generating VDD and CE supply from a Larger
Voltage Source
The CE pin has an internal pull-down resistor (R
INTERNAL
Figure 5). The impedance of this resistor is 400k
-500k
. If
your design is using a resistor divider network to generate
the 3.3V supply (for both V
DD
and CE to enable
programming) from a larger voltage source, the 400k
(worst case) resistor needs to be taken into account as a
parallel resistance when the CE pin is connected to this
source. Another design concern is to be able to provide
enough supply current during programming. The ISL45042A
draws about 2mA during this process. Recommended
resistor values are shown in Figure 5. This design will result
in an additional 0.83mA quiescent current flowing through
resistors R
A
and R
B
..
VCC= 5V
ISL45042A Truth Table
The ISL45042A truth table is shown in Table 2. For proper
operation the CE should be disabled (pulled low) before
powering the device down to assure that the glitches and
transients will not cause unwanted EEPROM overwriting.
SETTING VALUE
VOUT
1
5.468
10
5.313
20
5.141
30
4.969
40
4.797
50
4.625
60
4.453
70
4.281
80
4.109
90
3.936
100
3.764
110
3.592
128
3.282
TABLE 2. TRUTH TABLE
INPUT
OUTPUT
CTL
CE
VDD
OUT
ICC
MEMORY
Mid to Hi
Hi
VDD
Increment
Normal
X
Mid to Lo
Hi
VDD
Decrement
Normal
X
X
Lo
VDD
No Change
Increased
Read
>4.9V
Hi
VDD
No Change
Increased
Program
FIGURE 5. APPLICATION GENERATING VDD AND VCE
VOLTAGES
SCHMITT
TRIGGER
CE LOGIC
R
INTERNAL
= 400k
to 500k
R
A
2k
R
B
4k
ISL45042A
CE
VCE
ISL45042A