FN6189.4 December 17, 2010 Pin Descriptions PIN TYPE PULL U/D FUNCTION OUT Output Adjustable Sink Current Output Pin. The current that si" />
參數(shù)資料
型號: ISL45041IRZ
廠商: Intersil
文件頁數(shù): 2/7頁
文件大?。?/td> 0K
描述: IC CALIBRATOR LCD MODULE 8-DFN
標(biāo)準(zhǔn)包裝: 100
類型: 校準(zhǔn)器
應(yīng)用: LCD 顯示器
安裝類型: 表面貼裝
封裝/外殼: 8-WDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-TDFN(3x3)
包裝: 管件
產(chǎn)品目錄頁面: 1246 (CN2011-ZH PDF)
2
FN6189.4
December 17, 2010
Pin Descriptions
PIN
TYPE
PULL U/D
FUNCTION
OUT
Output
Adjustable Sink Current Output Pin. The current that sinks into the OUT pin is equal to the DAC setting times the
maximum adjustable sink current divided by 128. See SET pin function description for the maximum adjustable
sink current setting.
AVDD
Supply
High-Voltage Analog Supply. Bypass to GND with 0.1F capacitor.
WP
Input
Pull-Down Write Protect. Active Low. To enable programming, connect to 0.7*VDD supply or greater. The WP pin is
designed for static control. It has an internal pull-down current sink. To avoid the possibly over-writing the
EEPROM contents, no frequency above 1Hz should be applied to this input. Care should be taken to avoid any
glitches on the input. When removing or applying mechanical jumpers, always ensure the VDD power is off. A
high to low transition on the WP pin results in the register contents being loaded with EEPROM data.
GND
Supply
Ground connection.
VDD
Supply
Digital power supply input. Bypass to GND with 0.1F capacitor.
SDA
In/Out
I2C Serial Data Input and Output.
SCL
Input
I2C Clock Input
SET
Analog
Maximum Sink Current Adjustment Point. Connect a resistor from SET to GND to set the maximum adjustable
sink current of the OUT pin. The maximum adjustable sink current is equal to (AVDD/20) divided by RSET.
Block Diagram
GND
I2C
INTERFACE
DAC
REGISTERS
ANALOG DCP
AND
CURRENT SINK
7-BIT EEPROM
SCL
SDA
WP
VDD
AVDD
OUT
SET
1
8
2
5
7
6
3
4
ISL45041
CURRENT SINK
Q1
A1
ISL45041
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