參數(shù)資料
型號: ISL43L712
廠商: Intersil Corporation
英文描述: Ultra Low ON-Resistance, Single Supply, Differential SPST Analog Switches(超低導(dǎo)通電阻, 單電源, 差分單刀單擲模擬開關(guān))
中文描述: 超低電阻,單電源,差分SPST模擬開關(guān)(超低導(dǎo)通電阻,單電源,差分單刀單擲模擬開關(guān))
文件頁數(shù): 6/11頁
文件大?。?/td> 265K
代理商: ISL43L712
6
FN6092.2
April 12, 2007
Detailed Description
The ISL43L71x family of devices are bidirectional, single
pole/single throw (SPST) analog switches that offer precise
switching capability from a single 1.65V to 3.6V supply with
low on-resistance (0.16
Ω
) and high speed operation
(t
ON
= 13ns, t
OFF
= 13ns). The device is especially well
suited for portable battery powered equipment due to its low
operating supply voltage (1.65V), low power consumption
(2.7
μ
W max), low leakage currents (80nA max), and the tiny
TDFN and MSOP packaging. The ultra low on-resistance and
R
ON
flatness provide very low insertion loss and distortion to
application that require signal reproduction.
Supply Sequencing and Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (See
Figure 7). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1k
Ω
resistor in series with the input (See Figure 7). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low R
ON
switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (See Figure 7). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
FIGURE 3. OFF ISOLATION TEST CIRCUIT
FIGURE 4. R
ON
TEST CIRCUIT
FIGURE 5. CROSSTALK TEST CIRCUIT
FIGURE 6. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms
(Continued)
ANALYZER
R
L
SIGNAL
GENERATOR
V+
C
0V or V+
NO or NC
COM
IN
X
GND
V+
C
0V or V+
NO or NC
COM
IN
GND
V
NX
V
1
R
ON
= V
1
/100mA
1mA
0V or V+
ANALYZER
V+
C
NO1 or NC1
SIGNAL
GENERATOR
R
L
GND
IN
1
COM1
IN
2
50
Ω
0V or V+
NC
COM2
NO2 or NC2
V+
C
GND
NO or NC
COM
IN
X
IMPEDANCE
ANALYZER
0V or V+
ISL43L710, ISL43L711, ISL43L712
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