參數(shù)資料
型號(hào): ISL4244EIR-T
廠商: INTERSIL CORP
元件分類: 通用總線功能
英文描述: 5V High-Speed RS-232 Transceivers with 0.1uF Capacitors
中文描述: TRIPLE LINE TRANSCEIVER, PQCC32
封裝: 5 X 5 MM, PLASTIC, MO-220VHHD-2, QFN-32
文件頁(yè)數(shù): 14/17頁(yè)
文件大小: 457K
代理商: ISL4244EIR-T
14
Interconnection with 3V and 5V Logic
The ISL4238E/4XE directly interface with 5V CMOS and TTL
logic families. Nevertheless, with the ISL4238E/4XE at 3.3V,
and the logic supply at 5V, AC, HC, and CD4000 outputs can
drive ISL4238E/4XE inputs, but ISL4238E/4XE outputs do
not reach the minimum V
IH
for these logic families. See
Table 4 for more information.
±
15kV ESD Protection
All pins on ISL4238E/4XE devices include ESD protection
structures, but the RS-232 pins (transmitter outputs and
receiver inputs) incorporate advanced structures which allow
them to survive ESD events up to
±
15kV. The RS-232 pins
are particularly vulnerable to ESD damage because they
typically connect to an exposed port on the exterior of the
finished product. Simply touching the port pins, or
connecting a cable, can cause an ESD event that might
destroy unprotected ICs. These new ESD structures protect
the device whether or not it is powered up, protect without
allowing any latchup mechanism to activate, and don’t
interfere with RS-232 signals as large as
±
25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5k
current limiting resistor,
making the test less severe than the IEC6100 test which
utilizes a 330
limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to
±
15kV.
IEC6100-4-2 Testing
The IEC6100 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge
storage capacitor yields a test that is much more severe than
the HBM test. The extra ESD protection built into this
device’s RS-232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-232 port.
FIGURE 15. ISL4245E LOOPBACK TEST AT 250kbps
FIGURE 16. ISL4245E LOOPBACK TEST AT 1Mbps
(C
L
= 250pF)
T1
IN
T1
OUT
R1
OUT
2
μ
s/DIV.
5V/DIV.
V
CC
= +3.3V
C1 - C4 = 0.1
μ
F
T1
IN
T1
OUT
R1
OUT
0.5
μ
s/DIV.
5V/DIV.
V
CC
= +3.3V
C1 - C4 = 0.1
μ
F
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
SYSTEM
POWER-SUPPLY
VOLTAGE
(V)
V
CC
SUPPLY
VOLTAGE
(V)
COMPATIBILITY
3.3
3.3
Compatible with all CMOS
families.
5
5
Compatible with all TTL and
CMOS logic families.
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL.
ISL4238E/4XE outputs are
incompatible with AC, HC, and
CD4000 CMOS inputs.
ISL4238E, ISL4244E, ISL4245E
相關(guān)PDF資料
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