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| 型號(hào)： | ISL33003MSOPEVAL1Z |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 2/18頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD ISL33003 8MSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 電源管理，熱交換控制器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ISL33003IUZ |
| 主要屬性： | 2 通道總線緩沖器 |
| 次要屬性： | I²C 接口 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | ISL33003IUZ-T-ND - IC BUS BUFF HOTSWAP 2WR 8MSOP ISL33003IRTZ-T-ND - IC BUS BUFF HOTSWAP 2WR 8TDFN ISL33003IRTZ-ND - IC BUS BUFF HOTSWAP 2WR 8TDFN ISL33003IRT2Z-T-ND - IC BUS BUFF HOTSWAP 2WR 8TDFN ISL33003IRT2Z-ND - IC BUS BUFF HOTSWAP 2WR 8TDFN ISL33003IUZ-ND - IC BUS BUFF HOTSWAP 2WR 8MSOP |
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ISL33001, ISL33002, ISL33003
10
FN7560.5
December 19, 2013
accelerator current on both sides of the buffer will be equal. If the
pull-up resistance on both sides of the buffer are also equal, then
differences in the rise time will be proportional to the difference
in capacitive loading on the two sides.
Because the signals on each side of the buffer rise
independently, the propagation delay can be positive or negative.
If the input side rises slowly relative to the output (i.e., heavy
capacitive loading on the input and light load on the output) then
the propagation delay tPLH is negative. If the output side rises
slowly relative to the input, tPLH is positive.
For high to low transitions, there is a finite propagation delay
through the buffer from the time an external low on the input
drives the NMOS output low. This propagation delay will always
be positive because the buffer connect threshold on the falling
edge is below the measurement points of the delay. In addition
to the propagation delay of the buffer, there will be additional
delay from the different capacitive loading of the buffer. Figures
tPHL, is affected by VCC and capacitive loading.
The buffer’s propagation delay times for rising and falling edge
signals must be taken into consideration for the timing
requirements of the system. SETUP and HOLD times may need to
be adjusted to take into account excessively long propagation
delay times caused by heavy bus capacitances.
Pull-Up Resistor Selection
While the ISL33001, ISL33002, ISL33003 2-Channel buffers are
designed to improve the rise time of the bus in passive pull-up
systems, proper selection of the pull-up resistor is critical for
system operation when a buffer is used. For a bus that is
operating normally without active rise time circuitry, using the
ISL33001, ISL33002, ISL33003 buffer will allow larger pull-up
resistor values to reduce sink currents when the bus is driving
low. However, choose a pull-up resistor value of no larger than
20k regardless of the bus capacitance seen on the SDA/SCL
lines. The Bus Idle or Stop Bit condition requires valid logic high
voltages to give a valid connection state. Pull-up resistor values
20k or smaller are recommended to overcome the typical
150k impedance of the pre-charge circuitry, delivering valid
high levels.
Typical Performance Curves
CIN = COUT = 10pF, VCC1 = VCC2 = VCC, TA = +25°C; Unless Otherwise Specified.
FIGURE 11. ICC1 ENABLED CURRENT vs VCC1 (ISL33001)
FIGURE 12. ICC1 DISABLED CURRENT vs VCC1 (ISL33001)
I CC
1(m
A
)
VCC1 (V)
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
T = +85°C
T = +25°C
T = -40°C
VCC1 (V)
I CC1
(nA)
100
150
200
250
300
350
400
450
500
550
600
2.0
2.5
3.03.5
4.04.5
5.05.5
6.0
T = +85°C
T = +25°C
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