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參數(shù)資料
| 型號(hào)： | ISL3243EIRZ-T |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 2/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX RS232 ESD-PROT 32-QFN |
| 產(chǎn)品培訓(xùn)模塊： | Solutions for Industrial Control Applications |
| 標(biāo)準(zhǔn)包裝： | 6,000 |
| 類型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 3/5 |
| 規(guī)程： | RS232 |
| 電源電壓： | 2.7 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-QFN 裸露焊盤（5x5） |
| 包裝： | 帶卷 (TR) |
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ISL3241E, ISL3243E
10
FN6768.2
June 18, 2012
Software Controlled (Manual) Powerdown
The devices in this family provide pins that allow the user to
force the IC into the low power, standby state.
On the ISL3241E, the powerdown control is via a simple
shutdown (SHDN) pin. Driving this pin high enables normal
operation, while driving it low forces the IC into it’s powerdown
state. Connect SHDN to VL if the powerdown function isn’t
needed. Note that all the receiver outputs remain controlled by
EN during shutdown (see Table 2). For the lowest power
consumption during powerdown, the receivers should also be
disabled by driving the EN input high (see next section, and
The ISL3243E utilizes a two pin approach where the FORCEON
and FORCEOFF inputs determine the IC’s mode. For always
enabled operation, FORCEON and FORCEOFF are both
strapped high. To switch between active and powerdown
modes, under logic or software control, only the FORCEOFF
input need be driven. The FORCEON state isn’t critical, as
FORCEOFF dominates over FORCEON. Nevertheless, if strictly
manual control over powerdown is desired, the user must strap
FORCEON high to disable the automatic powerdown circuitry.
ISL3243E inverting (standard) receiver outputs also disable
when the device is in manual powerdown, thereby eliminating
the possible current path through a shutdown peripheral’s
Connecting FORCEOFF and FORCEON together disables the
automatic powerdown feature, enabling them to function as a
manual SHUTDOWN input (see Figure 7).
With any of the previous mentioned control schemes, the time
required to exit powerdown, and resume transmission is only
20s. A mouse, or other application, may need more time to
wake up from shutdown. If automatic power-down is being
utilized, the RS-232 device will reenter power-down if valid
receiver levels aren’t reestablished within 20s of the
ISL3243E powering up. Figure 8 illustrates a circuit that keeps
the ISL3243E from initiating automatic power-down for 100ms
after powering up. This gives the slow-to-wake peripheral
circuit time to reestablish valid RS-232 output levels.
VL Logic Supply Input
Note: If VL isn't connected to the Vcc supply, power-up Vcc
before powering up the VL supply.
The ISL324xE feature a VL pin that powers the logic input and
output pins. These pins interface with “l(fā)ogic” devices such as
UARTs, ASICs, and controllers, and today most of these
devices use power supplies significantly lower than 3.3V. Thus,
the logic device’s low VOH might not exceed the VIH of a 3.3V
powered ISL324xE logic input, or a 3.3V receiver output high
level might overdrive and damage the input diodes on an input
of a 1.8V powered logic device, as shown in Figure 9.
Connecting the VL pin to the power supply of the logic device
(see Figure 9) reduces the ISL324xE’s logic input switching
points, and limits the receiver output high voltage, to values
compatible with the logic device’s I/O levels. Tailoring the
ISL324XE’s logic pin input switching points and output levels
FIGURE 6. DISABLED RECEIVERS PREVENT POWER DRAIN
ISL324XE
TRANSITION
RX
TX
R2OUTB
R2OUT
T1IN
FORCEOFF = GND
VCC
VCCL
TO
R2IN
T1OUT
VOUT = HI-Z
POWERED
DETECTOR
DOWN
UART
WAKE-UP
LOGIC
OR
SHDN = GND, EN = VL
VL
VCC
VCCI
FIGURE 7. CONNECTIONS FOR MANUAL POWERDOWN WHEN NO
VALID RECEIVER SIGNALS ARE PRESENT
PWR
FORCEOFF
INVALID
CPU
I/O
FORCEON
ISL3243E
MGT
LOGIC
UART
VCCI
VCC
VCCL
VL
VCC
FIGURE 8. CIRCUIT TO PREVENT AUTO POWERDOWN FOR
100ms AFTER FORCED POWERUP
ISL3243E
FORCEOFF
FORCEON
POWER
MASTER POWERDOWN LINE
1M
0.1F
MANAGEMENT
UNIT
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