tZH(SHDN) R
參數(shù)資料
型號(hào): ISL3178AEMBZ
廠商: Intersil
文件頁(yè)數(shù): 11/14頁(yè)
文件大?。?/td> 0K
描述: TXRX ESD 3.3V RS485/422 8-SOIC
標(biāo)準(zhǔn)包裝: 980
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 管件
6
FN6887.2
December 2, 2013
Receiver Enable from Shutdown to
Output High
tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Notes 11, 13)
Full
-
240
500
ns
Receiver Enable from Shutdown to
Output Low
tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Notes 11, 13)
Full
-
240
500
ns
NOTES:
6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
7. Supply current specification is valid for loaded drivers when DE = 0V.
8. Applies to peak current. See “Typical Performance Curves” starting on page 10 for more information.
9. When testing devices with the shutdown feature, keep RE = 0 to prevent the device from entering SHDN.
10. When testing devices with the shutdown feature, the RE signal high time must be short enough (typically <100ns) to prevent the device from
entering SHDN.
11. Versions with a shutdown feature are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the
parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown.
12. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
13. Set the RE signal high time >600ns to ensure that the device enters SHDN.
14.
Δt
SKEW is the magnitude of the difference in propagation delays of the specified terminals of two units tested with identical test conditions (VCC,
temperature, etc.).
15. VCC ≥ 3.15V
16. Limits established by characterization and are not production tested.
17. If the Tx or Rx enable function isn’t needed, connect the enable pin to the appropriate supply (see “Pin Descriptions” on page 2) through a 1k
Ω
to 3k
Ω resistor.
18. For wafer sale the switching test limits are established by characterization.
Test Circuits and Waveforms
FIGURE 1A. VOD AND VOC
FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
Electrical Specifications
Test Conditions: VCC = 3.0V to 3.6V; Unless Otherwise Specified. Typicals are at VCC = 3.3V, TA = +25°C,
(Note 6). Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested.
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
TYP
MAX
UNITS
D
DE
DI
VCC
VOD
VOC
RL/2
Z
Y
D
DE
DI
VCC
VOD
375
Ω
375
Ω
Z
Y
RL = 60Ω
VCM
-7V TO +12V
ISL3178AE
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