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鎻忚堪锛� IC OPAMP GP RRIO 2MHZ QD 14SOIC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 55
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杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 1 V/µs
澧炵泭甯跺绌嶏細 2MHz
闆绘祦 - 杓稿叆鍋忓锛� 3pA
闆诲 - 杓稿叆鍋忕Щ锛� 500µV
闆绘祦 - 闆绘簮锛� 90µA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 22mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 1.8 V ~ 5.5 V锛�±0.9 V ~ 2.5 V
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渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 14-SOIC
鍖呰锛� 绠′欢
ISL28113, ISL28213, ISL28413
9
FN6728.7
November 15, 2012
Applications Information
Functional Description
The ISL28113, ISL28213 and ISL28413 are single, dual and
quad, CMOS rail-to-rail input, output (RRIO) micropower
operational amplifiers. They are designed to operate from single
supply (1.8V to 5.5V) or dual supply (卤0.9V to 卤2.75V). The parts
have an input common mode range that extends 100mV above
and below the power supply voltage rails. The output stage can
swing to within 15mV of the supply rails with a 10k load.
Input ESD Diode Protection
All input terminals have internal ESD protection diodes to both
positive and negative supply rails, limiting the input voltage to
within one diode beyond the supply rails (see 鈥淧in Descriptions -
Circuit 1鈥� on page 3). For applications where the input voltage
may exceed either power supply voltage by 0.5V or more, an
external series resistor must be used to ensure the input currents
never exceed 20mA (see Figure 19).
Output Phase Reversal
Output phase reversal is a change of polarity in the amplifier
transfer function when the input voltage exceeds the supply
voltage. The ISL28113, ISL28213 and ISL28413 are immune to
output phase reversal, even when the input voltage is 1V beyond
the supplies.
Unused Channels
If the application requires less than all amplifiers one channel,
the user must configure the unused channel(s) to prevent it from
oscillating. The unused channel(s) will oscillate if the input and
output pins are floating. This will result in higher than expected
supply currents and possible noise injection into the channel
being used. The proper way to prevent this oscillation is to short
the output to the inverting input and ground the positive input (as
shown in Figure 20).
Power Dissipation
It is possible to exceed the +125掳C maximum junction
temperatures under certain load, power supply conditions and
ambient temperature conditions. It is therefore important to
calculate the maximum junction temperature (TJMAX) for all
applications to determine if power supply voltages, load
conditions, or package type need to be modified to remain in the
safe operating area. These parameters are related using
Equation 1:
where:
PDMAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
PDMAX for each amplifier can be calculated using Equation 2:
where:
TMAX = Maximum ambient temperature
胃JA = Thermal resistance of the package
PDMAX = Maximum power dissipation of 1 amplifier
VS = Total supply voltage
IqMAX = Maximum quiescent supply current of 1 amplifier
VOUTMAX = Maximum output voltage swing of the application
RL = Load resistance
ISL28113, ISL28213 and ISL28413 SPICE
Model
Figure 21 shows the SPICE model schematic and Figure 22 shows
the net list for the SPICE model. The model is a simplified version
of the actual device and simulates important AC and DC
parameters. AC parameters incorporated into the model are: 1/f
and flatband noise, Slew Rate, CMRR, Gain and Phase. The DC
parameters are IOS, total supply current and output voltage swing.
The model uses typical parameters given in the 鈥淓lectrical
Specifications鈥� Table beginning on page 4. The AVOL is adjusted
for 85dB with the dominate pole at 100Hz. The CMRR is set 72dB,
f = 35kHz). The input stage models the actual device to present an
accurate AC representation. The model is configured for ambient
temperature of +25掳C.
Figures 23 through 32 show the characterization vs simulation
results for the Noise Voltage, Closed Loop Gain vs Frequency,
Large Signal 5V Step Response, CMRR and Open Loop Gain
Phase.
FIGURE 19. INPUT ESD DIODE CURRENT LIMITING
-
+
RIN-
RL
VIN-
V+
V-
RIN+
RF
RG
FIGURE 20. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
-
+
T
JMAX
T
MAX
胃
JAxPDMAXTOTAL
+
=
(EQ. 1)
PD
MAX
V
S
I
qMAX
V
S
(
- V
OUTMAX )
V
OUTMAX
R
L
----------------------------
脳
+
脳
=
(EQ. 2)
鐩搁棞(gu膩n)PDF璩囨枡
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1SMA48CAT3G TVS 400W 48V BIDIRECT SMA
1SMA26CAT3G TVS 400W 26V BIDIRECT SMA
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ISL28413FVZ 鍔熻兘鎻忚堪:IC OPAMP GP RRIO 2MHZ QD 14TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:鍎€琛� 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:婊挎摵骞� 杞�(zhu菐n)鎻涢€熺巼:5 V/µs 澧炵泭甯跺绌�:- -3db甯跺:2MHz 闆绘祦 - 杓稿叆鍋忓:0.5pA 闆诲 - 杓稿叆鍋忕Щ:250µV 闆绘祦 - 闆绘簮:415µA 闆绘祦 - 杓稿嚭 / 閫氶亾:48mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):2.5 V ~ 5.5 V锛�±1.25 V ~ 2.75 V 宸ヤ綔婧害:-55°C ~ 125°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:14-TSSOP 鍖呰:鍓垏甯� (CT) 鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈�:849 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:296-12431-1296-12431-1-NDINA2331AIPWRCT
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