參數(shù)資料
型號(hào): ISL28274FAZ-T7
廠商: Intersil
文件頁(yè)數(shù): 8/18頁(yè)
文件大小: 0K
描述: IC INSTR/OP AMP RRIO SGL 16-QSOP
標(biāo)準(zhǔn)包裝: 1
放大器類型: 儀表
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.5 V/µs
增益帶寬積: 6MHz
電流 - 輸入偏壓: 10pA
電壓 - 輸入偏移: 35µV
電流 - 電源: 120µA
電流 - 輸出 / 通道: 31mA
電壓 - 電源,單路/雙路(±): 2.4 V ~ 5 V,±1.2 V ~ 2.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 1235 (CN2011-ZH PDF)
其它名稱: ISL28274FAZ-T7DKR
16
FN6345.3
May 14, 2009
Input Stage and Input Voltage Range
The input terminals (IN+ and IN-) of both amplifiers “A” and
“B” are single differential pair P-MOSFET devices aided by
an Input Range Enhancement Circuit to increase the
headroom of operation of the common-mode input voltage.
The feedback terminals (FB+ and FB-) of amplifier “A” also
have a similar topology. As a result, the input common-mode
voltage range is rail-to-rail. These amps are able to handle
input voltages that are at or slightly beyond the supply and
ground making them well suited for single 5V or 3.3V low
voltage supply systems. There is no need then to move the
common-mode input to achieve symmetrical input voltage.
Output Stage and Output Voltage Range
A pair of complementary MOSFET devices drives the output
VOUT to within a few mV of the supply rails. At a 100kΩ load,
the PMOS sources current and pulls the output up to 4mV
below the positive supply, while the NMOS sinks current and
pulls the output down to 3mV above the negative supply, or
ground in the case of a single supply operation. The current
sinking and sourcing capability of the ISL28274 are internally
limited to 31mA.
Gain Setting of Instrumentation Amp “A”
VIN, the potential difference across IN+ and IN-, is replicated
(less the input offset voltage) across FB+ and FB-. The goal
of the ISL28274 in-amp is to maintain the differential voltage
across FB+ and FB- equal to IN+ and IN-;
(FB+ - FB-) = (IN+ - IN-). Consequently, the transfer function
can be derived. The gain is set by two external resistors, the
feedback resistor RF, and the gain resistor RG.
In Figure 61, the FB+ pin and one end of resistor RG are
connected to GND. With this configuration, Equation 1 is
only true for a positive swing in VIN; negative input swings
will be ignored and the output will be at ground.
Reference Connection
Unlike a three-op amp instrumentation amplifier, a finite
series resistance seen at the REF terminal does not degrade
the high CMRR performance, eliminating the need for an
additional external buffer amplifier. Figure 62 uses the FB+
pin to provide a high impedance REF terminal.
The FB+ pin is used as a REF terminal to center or to adjust
the output. Because the FB+ pin is a high impedance input,
an economical resistor divider can be used to set the voltage
at the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will
shift VOUT by VREF times the closed loop gain, which is set
by resistors RF and RG as shown in Figure 62.
The FB+ pin can also be connected to the other end of resistor,
RG. See Figure 63. Keeping the basic concept that the in-amps
maintain constant differential voltage across the input terminals
and feedback terminals (IN+ - IN- = FB+ - FB-), the transfer
function of Figure 63 can be derived.
7
6
5
3
4
8
16
2
+
-
+
-
IN+
IN-
FB+
FB-
V+
V-
2.4V TO 5V
RF
RG
VOUT
ISL28274
VCM
VIN/2
FIGURE 61. GAIN IS BY EXTERNAL RESISTORS RF AND RG
AMP “A”
VOUT
1
R
F
R
G
--------
+
VIN
=
(EQ. 1)
FIGURE 62. GAIN SETTING AND REFERENCE CONNECTION
7
6
5
3
4
8
16
2
+
-
+
-
IN+
IN-
FB+
FB-
V+
V-
2.4V TO 5V
RF
RG
VOUT
ISL28274
VCM
VIN/2
R1
R2
REF
2.4V to 5V
AMP “A”
VOUT
1
R
F
R
G
--------
+
VIN
()
1
R
F
R
G
--------
+
VREF
()
+
=
(EQ. 2)
7
6
5
3
4
8
16
2
+
-
+
-
IN+
IN-
FB+
FB-
V+
V-
2.4V TO 5V
RF
RG
VOUT
ISL28274
VCM
VIN/2
VREF
FIGURE 63. REFERENCE CONNECTION WITH AN AVAILABLE
VREF
AMP “A”
ISL28274, ISL28474
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