參數(shù)資料
型號(hào): ISL28195FRUZ-T7
廠商: Intersil
文件頁數(shù): 12/12頁
文件大?。?/td> 0K
描述: IC OPAMP RRIO SGL 1UA 6-TDFN
標(biāo)準(zhǔn)包裝: 1,000
放大器類型: 通用
電路數(shù): 1
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 0.0042 V/µs
增益帶寬積: 10kHz
電流 - 輸入偏壓: 15pA
電壓 - 輸入偏移: 100µV
電流 - 電源: 1µA
電流 - 輸出 / 通道: 12mA
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V,±0.9 V ~ 2.75 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-UFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 6-UTDFN(1.6x1.6)
包裝: 帶卷 (TR)
9
FN6236.5
January 14, 2014
Pin Descriptions
Applications Information
Introduction
The ISL28194 is a CMOS rail-to-rail input and output (RRIO)
micropower operational amplifier. This device is designed to
operate from single supply (1.8V to 5.5V) and has an input
common mode range that extends to the positive rail and to the
negative supply rail for true rail-to-rail performance. The CMOS
output can swing within tens of millivolts to the rails. Featuring
worst-case maximum supply current of 0.5A, this amplifier is
ideally suited for solar and battery-powered applications.
Input Protection
All input terminals have internal ESD protection diodes to
both positive and negative supply rails, limiting the input
voltage to within one diode beyond the supply rails. The
ISL28194 has a maximum input differential voltage that
includes the rails (-V -0.5V to +V +0.5V).
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to
achieve the rail-to-rail output swing. The NMOS sinks current
to swing the output in the negative direction. The PMOS
sources current to swing the output in the positive direction.
The ISL28194 will typically swing to within 40mV or less to
either rail with a 100k
Ω load (reference Figures 24 and 26).
Enable/Disable Feature
This part offers an EN pin that enables the device when pulled
high. The enable threshold is referenced to the -V terminal and
has a level proportional to the total supply voltage (reference
Figure 11 for EN threshold vs supply voltage). The enable
circuit has a delay time that changes as a function of supply
voltage. Figures 12 and 13 show the effect of supply voltage
on the enable and disable times. For supply voltages less
than 3V, it is recommended that the user account for the
increase enable/disable delay time.
ISL28194
(6 LD SOT-23)
ISL28194
(6 LD ΜTDFN) PIN NAME
EQUIVALENT
CIRCUIT
DESCRIPTION
1
4
OUT_A
Circuit 3
Amplifier output
2
V-
Circuit 4
Negative power supply
3
IN+
Circuit 1
Amplifier non-inverting input
4
1
IN-
Circuit 1
Amplifier inverting input
5
EN
Circuit 2
Amplifier enable pin; Logic “1” selects the enabled state, Logic “0” selects the
disabled state.
6
V+
Circuit 4
Positive power supply
LOGIC
PIN
V+
V-
V+
V-
OUT
CIRCUIT 3
CIRCUIT 1
CIRCUIT 2
V+
V-
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 4
IN-
V+
V-
IN+
100
Ω
AC Test Circuits
FIGURE 28. TEST CIRCUIT FOR AV = +1
FIGURE 29. TEST CIRCUIT FOR AV = +101
+
-
5V
VOUT
10k
EN
VIN
V+/2
+
-
5V
VOUT
10k
EN
VCM = V+/2
10
1k
VIN
ISL28194
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