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寤犲晢锛� Intersil
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ISL26310, ISL26311, ISL26312, ISL26313, ISL26314, ISL26315, ISL26319
12
FN7549.2
February 26, 2014
Circuit Description
The ISL26310, ISL26311, ISL26312, ISL26313, ISL26314,
ISL26315 and ISL26319 families are of 12-bit ADCs are
low-power Successive Approximation-type (SAR) ADCs with 1-,
2-, 4-, or 8-channels and a choice of single-ended or differential
inputs. The high-impedance buffered input simplifies interfacing
to sensors and external circuitry.
The entire ISL26310, ISL26311, ISL26312, ISL26313, ISL26314,
ISL26315 and ISL26319 families are follows the same base
pinout and differs only in the analog input pins, allowing the user
to replicate the basic board layout across multiple platforms with
a minimum redesign effort.
The simple serial digital interface is compatible with popular
FPGAs and microcontrollers and allows direct conversion control
by the CNV pin.
Functional Description
The ISL26310, ISL26311, ISL26312, ISL26313, ISL26314,
ISL26315 and ISL26319 devices are SAR (Successive
Approximation Register) analog-to-digital converters that use
capacitor-based charge redistribution as their conversion
method.
These devices include an on-chip power-on reset (POR) circuit to
initialize the internal digital logic when power is applied. An
on-chip oscillator provides the master clock for the conversion
logic. The CNV signal controls when the converter enters into its
signal acquisition time (CNV = 0), and when it begins the
conversion sequence after the signal has been captured
(CNV = 1). The converters include a configuration register that
can be accessed via the serial port. The configuration register
has various bits to indicate which channel (where applicable) is
selected, to activate the auto-power-down feature where the ADC
is shut down between conversions, or to output the configuration
register contents along with the data conversion word whenever
a conversion word is read from the serial port. The serial port
supports three different modes of reading the conversion data.
These will be discussed later in this data sheet.
Figures 19 and 20 illustrate simplified representations of the
converter analog section for differential and single-ended inputs,
respectively. During the acquisition phase (CNV = 0) the input
signal is presented to the Cs samples capacitors. To properly
sample the signal, the CNV signal must remain low for the
specified time. When CNV is taken high (CNV = 1), the switches
that connect the sampling capacitors to the input are opened
and the control logic begins the successive approximation
sequence to convert the captured signal into a digital word. The
conversion sequence timing is determined by the on-chip
oscillator.
ADC Transfer Function
The ISL26310, ISL26312, and the ISL26314 feature differential
inputs with output data coding in two's complement format
(see Table 1). The size of one LSB in these devices is
(2*VREF)/4096. Figure 21 illustrates the ideal transfer function for
these devices.
The ISL26311, ISL26313, ISL26315, and ISL26319 feature
single-ended inputs with output coding in binary format
(see Table 2). The size of one LSB in these devices is VREF/4096.
Figure 22 illustrates the ideal transfer function for these devices.
FIGURE 19. ARCHITECTURAL BLOCK DIAGRAM, DIFFERENTIAL INPUT
FIGURE 20. ARCHITECTURAL BLOCK DIAGRAM, SINGLE-ENDED
AIN+
AIN
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VREF
ACQ
CNV
ACQ
CNV
DA
C
DA
C
SAR
LOGIC
Buffer
VCM
CNV
ACQ
COMPARATOR
VREF
CS
AIN
VREF
ACQ
CNV
ACQ
CNV
DAC
DA
C
SAR
LOGIC
Buffer
VCM
CNV
ACQ
COMPARATOR
CS
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ISL26313FBZ-T 鍔熻兘鎻忚堪:IC ADC 12BIT SPI/SRL 125K 8SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:250 绯诲垪:- 浣嶆暩(sh霉):12 閲囨ǎ鐜囷紙姣忕锛�:1.8M 鏁�(sh霉)鎿�(j霉)鎺ュ彛:骞惰伅(li谩n) 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 鍔熺巼鑰楁暎锛堟渶澶э級:1.82W 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:48-LQFP 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:48-LQFP锛�7x7锛� 鍖呰:绠′欢 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:2 鍊嬪柈绔�锛屽柈妤�
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ISL26314 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels
ISL26314FVZ 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL26314FVZ 12-BIT, 125KSPS, 4-CHANNEL, DIFFERENTIAL SAR ADC - Rail/Tube
ISL26314FVZ-T 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL26314FVZ 12-BIT, 125KSPS, 4-CHANNEL, DIFFERENTIAL SAR ADC - Tape and Reel
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