16 FN7904.1 July 19, 2012 Write Operation A write operation to the ISL23428 is a two or more bytes operation. First, It requires the C" />
參數(shù)資料
型號: ISL23428WFVZ-T7A
廠商: Intersil
文件頁數(shù): 8/21頁
文件大小: 0K
描述: IC DGTL POT 2CH 10K 14TSSOP
標準包裝: 1
系列: XDCP™
接片: 128
電阻(歐姆): 10k
電路數(shù): 2
溫度系數(shù): 標準值 125 ppm/°C
存儲器類型: 易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 1.2 V ~ 5.5 V,1.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應商設(shè)備封裝: 14-TSSOP
包裝: 標準包裝
其它名稱: ISL23428WFVZ-T7ADKR
ISL23428
16
FN7904.1
July 19, 2012
Write Operation
A write operation to the ISL23428 is a two or more bytes
operation. First, It requires the CS transition from HIGH-to-LOW.
Then the host sends a valid Instruction Byte, followed by one or
more Data Bytes to the SDI pin. The host terminates the write
operation by pulling the CS pin from LOW-to-HIGH. Instruction is
executed on the rising edge of CS (see Figure 27).
Read Operation
A Read operation to the ISL23428 is a four byte operation. First,
It requires the CS transition from HIGH-to-LOW. Then the host
sends a valid Instruction Byte, followed by a “dummy” Data Byte,
NOP Instruction Byte and another “dummy” Data Byte to SDI pin.
The SPI host receives the Instruction Byte (instruction code +
register address) and requested Data Byte from SDO pin on the
rising edge of SCK during third and fourth bytes, respectively. The
host terminates the read by pulling the CS pin from LOW-to-HIGH
(see Figure 28).
FIGURE 27. TWO BYTE WRITE SEQUENCE
CS
SCK
SDI
SDO
WR INSTRUCTION
DATA BYTE
1
3
4
5
7
8
9
1011
1213141516
26
ADDR
FIGURE 28. FOUR BYTE READ SEQUENCE
CS
SCK
SDI
SDO
RD
ADDR
NOP
RD
ADDR
READ DATA
1
8
16
24
32
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