7 FN7780.1 August 16, 2011 tDCP Wiper Response Time W option; CS rising edge to wiper n" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ISL23415WFRUZ-T7A
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 18/20闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC DGTL POT 256POS 10K 10TQFN
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Solutions for Industrial Control Applications
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 1
绯诲垪锛� XDCP™
鎺ョ墖锛� 256
闆婚樆锛堟瓙濮嗭級锛� 10k
闆昏矾鏁�(sh霉)锛� 1
婧害绯绘暩(sh霉)锛� 妯�(bi膩o)婧�(zh菙n)鍊� 175 ppm/°C
瀛樺劜鍣ㄩ鍨嬶細 鏄撳け
鎺ュ彛锛� 4 绶� SPI锛堣姱鐗囬伕鎿囷級
闆绘簮闆诲锛� 1.2 V ~ 5.5 V锛�1.7 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 10-UFQFN
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 10-UTQFN锛�2.1x1.6锛�
鍖呰锛� 妯�(bi膩o)婧�(zh菙n)鍖呰
鍏跺畠鍚嶇ū锛� ISL23415WFRUZ-T7ADKR
ISL23415
7
FN7780.1
August 16, 2011
tDCP
Wiper Response Time
W option; CS rising edge to wiper new position,
from 10% to 90% of final value.
0.4
s
U option; CS rising edge to wiper new position,
from 10% to 90% of final value.
1.5
s
T option; CS rising edge to wiper new position,
from 10% to 90% of final value.
3.5
s
tShdnRec
DCP Recall Time From Shutdown Mode
CS rising edge to wiper recalled position and
RH connection
1.5
s
VCC, VLOGIC
Ramp
VCC, VLOGIC Ramp Rate
Ramp monotonic at any level
0.01
50
V/ms
Operating Specifications VCC = 2.7V to 5.5V, VLOGIC = 1.2V to 5.5V over recommended operating conditions unless otherwise stated.
Boldface limits apply over the operating temperature range, -40掳C to +125掳C.
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 20)
TYP
(Note 8)
MAX
(Note 20)
UNITS
Serial Interface Specification For SCK, SDI, SDO, CS Unless Otherwise Noted.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 20)
TYP
(Note 8)
MAX
(Note 20)
UNITS
VIL
Input LOW Voltage
-0.3
0.3 x VLOGIC
V
VIH
Input HIGH Voltage
0.7 x VLOGIC
VLOGIC+ 0.3
V
Hysteresis
SDI and SCK Input Buffer Hysteresis
VLOGIC > 2V
0.05 x VLOGIC
V
VLOGIC < 2V
0.1 x VLOGIC
VOL
SDO Output Buffer LOW Voltage
IOL = 3mA, VLOGIC > 2V
0
0.4
V
IOL = 1.5mA, VLOGIC < 2V
0.2 x VLOGIC
V
Rpu
(Note 19)
SDO Pull-up Resistor Off-chip
Maximum is determined by tRO and tFO with
maximum bus load Cb = 30pF, fSCK =5MHz
1.5
k
Cpin
SCK, SDO, SDI, CS Pin Capacitance
10
pF
fSCK
SCK Frequency
VLOGIC = 1.7V to 5.5V
5
MHz
VLOGIC = 1.2V to 1.6V
1
MHz
tCYC
SPI Clock Cycle Time
VLOGIC 鈮� 1.7V
200
ns
tWH
SPI Clock High Time
VLOGIC 鈮� 1.7V
100
ns
tWL
SPI Clock Low Time
VLOGIC 鈮� 1.7V
100
ns
tLEAD
Lead Time
VLOGIC 鈮� 1.7V
250
ns
tLAG
Lag Time
VLOGIC 鈮� 1.7V
250
ns
tSU
SDI, SCK and CS Input Setup Time
VLOGIC 鈮� 1.7V
50
ns
tH
SDI, SCK and CS Input Hold Time
VLOGIC 鈮� 1.7V
50
ns
tRI
SDI, SCK and CS Input Rise Time
VLOGIC 鈮� 1.7V
10
ns
tFI
SDI, SCK and CS Input Fall Time
VLOGIC 鈮� 1.7V
10
20
ns
tDIS
SDO Output Disable Time
VLOGIC 鈮� 1.7V
0
100
ns
tSO
SDO Output Setup Time
VLOGIC 鈮� 1.7V
50
ns
tV
SDO Output Valid Time
VLOGIC 鈮� 1.7V
150
ns
tHO
SDO Output Hold Time
VLOGIC 鈮� 1.7V
0
ns
tRO
SDO Output Rise Time
Rpu = 1.5k, Cbus = 30pF
60
ns
tFO
SDO Output Fall Time
Rpu = 1.5k, Cbus = 30pF
60
ns
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