18 FN7903.1 August 24, 2011 Package Outline Drawing M20.173 20 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 2, 5/10 DETAIL "" />
參數(shù)資料
型號: ISL23348UFVZ-TK
廠商: Intersil
文件頁數(shù): 10/19頁
文件大?。?/td> 0K
描述: IC DGTL POT 4CH 50K 20TSSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: XDCP™
接片: 128
電阻(歐姆): 50k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 65 ppm/°C
存儲器類型: 易失
接口: I²C(設(shè)備位址)
電源電壓: 1.2 V ~ 5.5 V,1.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 帶卷 (TR)
ISL23348
18
FN7903.1
August 24, 2011
Package Outline Drawing
M20.173
20 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 2, 5/10
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
SIDE VIEW
END VIEW
Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
Dimensions are measured at datum plane H.
Dimensioning and tolerancing per ASME Y14.5M-1994.
Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.08mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead
is 0.07mm.
Dimension in ( ) are for reference only.
Conforms to JEDEC MO-153.
6.
3.
5.
4.
2.
1.
NOTES:
7.
0.09-0.20
SEE DETAIL "X"
(0.65 TYP)
(5.65)
(0.35 TYP)
0.90 +0.15/-0.10
0.60 ±0.15
0.15 MAX
0.05 MIN
PLANE
GAUGE
0°-8°
0.25
1.00 REF
(1.45)
20
0.20 C B A
2
1
3
9
B
1
3
10
A
PIN #1
I.D. MARK
6.50 ±0.10
6.40
4.40 ±0.10
0.65
0.10 C
SEATING
PLANE
0.25 +0.05/-0.06 5
C
H
-
0.05
1.20 MAX
0.10
C B A
M
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