17 FN7870.0 June 21, 2011 Applications Information VLOGIC Requirements<" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� ISL23325WFVZ-TK
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 9/20闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DGTL POT 256POS 10K 14TSSOP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 1,000
绯诲垪锛� XDCP™
鎺ョ墖锛� 256
闆婚樆锛堟瓙濮嗭級锛� 10k
闆昏矾鏁�(sh霉)锛� 2
婧害绯绘暩(sh霉)锛� 妯�(bi膩o)婧�(zh菙n)鍊� 125 ppm/°C
瀛樺劜(ch菙)鍣ㄩ鍨嬶細 鏄撳け
鎺ュ彛锛� I²C锛�2 绶氫覆鍙�
闆绘簮闆诲锛� 1.2 V ~ 5.5 V锛�1.7 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� *
灏佽/澶栨锛� *
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 *
鍖呰锛� *
ISL23325
17
FN7870.0
June 21, 2011
Applications Information
VLOGIC Requirements
VLOGIC should be powered continuously during normal operation.
In a case where turning VLOGIC OFF is necessary, it is
recommended to ground the VLOGIC pin of the ISL23325.
Grounding the VLOGIC pin or both VLOGIC and VCC does not affect
other devices on the same bus. It is good practice to put a 1F
cap in parallel to 0.1F as close to the VLOGIC pin as possible.
VCC Requirements and Placement
It is recommended to put a 1F capacitor in parallel with 0.1F
decoupling capacitor close to the VCC pin.
Wiper Transition
When stepping up through each tap in voltage divider mode,
some tap transition points can result in noticeable voltage
transients, or overshoot/undershoot, resulting from the sudden
transition from a very low impedance 鈥渕ake鈥� to a much higher
impedance 鈥渂reak鈥� within a short period of time (<1s). There
are several code transitions such as 0Fh to 10h, 1Fh to 20h,...,
EFh to FFh, which have higher transient glitch. Note, that all
switching transients will settle well within the settling time as
stated in the datasheet. A small capacitor can be added
externally to reduce the amplitude of these voltage transients.
However, that will also reduce the useful bandwidth of the circuit,
thus may not be a good solution for some applications. It may be
a good idea, in that case, to use fast amplifiers in a signal chain
for fast recovery.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
LB15SKW01-05-BJ SWITCH PUSHBUTTON SPDT 3A 125V
ISL23325WFRUZ-TK IC DGTL POT 256POS 10K 16UTQFN
LB25CKW01-H SWITCH PUSHBUTTON DPDT 3A 125V
ABLS3-6.000MHZ-D4Y-T CRYSTAL 6.000 MHZ 18PF SMD
F980J106MMA CAP TANT 10UF 6.3V 20% 0603
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ISL23328 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:Dual, 128-Tap, Low Voltage Digitally Controlled Potentiometer (XDCPa?锟�)
ISL23328TFRUZ-T7A 鍔熻兘鎻忚堪:鏁�(sh霉)瀛楅浕浣嶈▓(j矛) IC 128 TAPVOLATILE I2C DUAL RNG IND 16LD RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩(sh霉):35 PPM / C 瀹瑰樊:25 % POT 鏁�(sh霉)閲�:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜(ch菙)鍣�:Volatile 绶╂矕鍒�: 鏁�(sh霉)瀛楁帴鍙�:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel
ISL23328TFRUZ-TK 鍔熻兘鎻忚堪:鏁�(sh霉)瀛楅浕浣嶈▓(j矛) IC 128 TAP VOLATILE I2C DL FL RNG DCP 16LD RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩(sh霉):35 PPM / C 瀹瑰樊:25 % POT 鏁�(sh霉)閲�:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜(ch菙)鍣�:Volatile 绶╂矕鍒�: 鏁�(sh霉)瀛楁帴鍙�:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel
ISL23328TFVZ 鍔熻兘鎻忚堪:鏁�(sh霉)瀛楅浕浣嶈▓(j矛) IC 128 TAP VOLATILE I2C DL FL RNG DCP 14LD RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩(sh霉):35 PPM / C 瀹瑰樊:25 % POT 鏁�(sh霉)閲�:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜(ch菙)鍣�:Volatile 绶╂矕鍒�: 鏁�(sh霉)瀛楁帴鍙�:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel
ISL23328TFVZ-T7A 鍔熻兘鎻忚堪:鏁�(sh霉)瀛楅浕浣嶈▓(j矛) IC 128 TAPVOLATILE I2C DUAL RNG IND 14LD RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩(sh霉):35 PPM / C 瀹瑰樊:25 % POT 鏁�(sh霉)閲�:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜(ch菙)鍣�:Volatile 绶╂矕鍒�: 鏁�(sh霉)瀛楁帴鍙�:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel