參數(shù)資料
型號(hào): ISL22449UFV14Z-TK
廠商: Intersil
文件頁(yè)數(shù): 12/13頁(yè)
文件大?。?/td> 0K
描述: IC POT DGTL 128TP LN LP 14-TSSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: XDCP™
接片: 128
電阻(歐姆): 50k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 ±80 ppm/°C
存儲(chǔ)器類(lèi)型: 非易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
8
FN6333.3
July 17, 2009
Pin Description
Potentiometers Pins
RWI (I = 0, 1, 2, 3)
RWi is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the WRi register.
SHDN
The SHDN pin forces the resistors to end-to-end open circuit
condition and shorts all RWs to GND. When SHDN is
returned to logic high, the previous latch settings put RWi at
the same resistance setting prior to shutdown. This pin is
logically ANDed with the SHDN bit in the ACR register. SPI
interface is still available in shutdown mode and all registers
are accessible. This pin must remain HIGH for normal
operation.
Bus Interface Pins
SERIAL CLOCK (SCK)
This is the serial clock input of the SPI serial interface.
SERIAL DATA OUTPUT (SDO)
The SDO is an open drain serial data output pin. During a
read cycle, the data bits are shifted out at the falling edge of
the serial clock SCK, while the CS input is low.
SDO requires an external pull-up resistor for proper operation.
FIGURE 7. END TO END RTOTAL % CHANGE vs
TEMPERATURE
FIGURE 8. TC FOR VOLTAGE DIVIDER MODE IN ppm
FIGURE 9. MIDSCALE GLITCH, CODE 80h TO 7Fh
FIGURE 10. LARGE SIGNAL SETTLING TIME
Typical Performance Curves (Continued)
-1.0
-0.5
0.0
0.5
1.0
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
END
T
O
E
N
D
R
TO
T
A
L
CHANGE
(%)
50k
10k
VCC = 5.5V
VCC = 2.7V
0
15
30
45
60
75
90
105
16
36
56
76
96
TAP POSITION (DECIMAL)
TCv
(pp
m
C)
50k
10k
SIGNAL AT WIPER
(WIPER UNLOADED)
SIGNAL AT WIPER
(WIPER UNLOADED MOVEMENT
FROM 7Fh TO 00h)
SCL
RW
FIGURE 11. DCP CONNECTION IN SHUTDOWN MODE
ISL22449
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