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參數(shù)資料
| 型號： | ISL21400 |
| 廠商： | Intersil Corporation |
| 英文描述： | Programmable Temperature Slope Voltage Reference(可編程溫度斜率電壓基準(zhǔn)) |
| 中文描述： | 可編程溫度斜坡電壓基準(zhǔn)（可編程溫度斜率電壓基準(zhǔn)） |
| 文件頁數(shù)： | 6/17頁 |
| 文件大?。?/td> | 439K |
| 代理商： | ISL21400 |
6
FN8091.1
April 24, 2007
Timing Diagrams
Bus Timing
Write Cycle Timing
NOTES:
1. Equation 1 governs the output voltage and is stated as follows:
2. Typical values are for T
A
= +25°C and V
CC
= 5.5V.
Rpu
SDA and SCL Bus Pull-up Resistor
Off-chip
Maximum is determined by t
R
and t
F
For Cb = 400pF, max is about
2~2.5k
Ω
For Cb = 40pF, max is about
15~20k
Ω
1
k
Ω
I
LO
Output Leakage Current (SDA only) V
OUT
= GND to V
CC
1
μA
V
IL
A1, A0, SHDN, SDA, and SCL Input
Buffer LOW Voltage
-0.3
V
CC
x 0.3
V
V
IH
A1, A0, SHDN, SDA, and SCL Input
Buffer HIGH Voltage
V
CC
x 0.7
V
CC
V
V
OL
SDA Output Buffer LOW Voltage
I
OL
= 100μA (Note 3), at 3mA
sink
0
0.4
V
C
L
Capacitive Loading of SDA or SCL
Total on-chip and off-chip
(Note 3)
10
400
pF
EEPROM Endurance
1,000,000
Cycles
EEPROM Retention
Temperature T
≤
+55°C
50
Years
t
WC
(Note 14)
Non-Volatile Write Cycle Time
12
20
ms
Serial Interface Specification
(for SCL, SDA, A0, A1, A2 unless specified otherwise)
(Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(Note 2)
MAX
UNITS
t
SU:STO
t
DH
t
HIGH
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
SCL
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
t
F
t
LOW
t
BUF
t
AA
t
R
t
sp
t
HD:STO
SCL
SDA
t
WC
8th BIT OF LAST BYTE
ACK
STOP
CONDITION
START
CONDITION
V
OUT
A
V
V
REF
---------
K T
T
0
–
)
------------------–
(
+
n = 0 to 255, m = 0 to 255, K = -2.1mV/C(typ), T0 = +25
°
C
,
=
ISL21400
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