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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | ISL1208IU8Z |
| 寤犲晢锛� | Intersil |
| 鏂囦欢闋佹暩(sh霉)锛� | 12/24闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC RTC LP BATT BACKED SRAM 8MSOP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 80 |
| 椤炲瀷锛� | 鏅�(sh铆)閻�/鏃ユ |
| 鐗归粸(di菐n)锛� | 璀﹀牨(b脿o)鍣�锛岄枏骞达紝SRAM |
| 瀛樺劜瀹归噺锛� | 2B |
| 鏅�(sh铆)闁撴牸寮忥細 | HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� |
| 鏁�(sh霉)鎿�(j霉)鏍煎紡锛� | YY-MM-DD-dd |
| 鎺ュ彛锛� | I²C锛�2 绶氫覆鍙� |
| 闆绘簮闆诲锛� | 2.7 V ~ 5.5 V |
| 闆诲 - 闆绘簮锛岄浕姹狅細 | 1.8 V ~ 5.5 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-MSOP |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 1245 (CN2011-ZH PDF) |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�鐣�(d膩ng)鍓嶇12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�
2
FN8085.8
September 12, 2008
.
Block Diagram
Ordering Information
PART NUMBER
PART MARKING
VDD RANGE
(V)
TEMP. RANGE
(掳C)
PACKAGE
PKG. DWG. #
ISL1208IU8
AGS
2.7 to 5.5
-40 to +85
8 Ld MSOP
M8.118
ISL1208IU8-TK*
AGS
2.7 to 5.5
-40 to +85
8 Ld MSOP Tape and
Reel
M8.118
ISL1208IU8Z (Note)
ANW
2.7 to 5.5
-40 to +85
8 Ld MSOP (Pb-free)
M8.118
ISL1208IU8Z-TK*
(Note)
ANW
2.7 to 5.5
-40 to +85
8 Ld MSOP
Tape and Reel
(Pb-free)
M8.118
ISL1208IB8
1208 I
2.7 to 5.5
-40 to +85
8 Ld SOIC
MDP0027
ISL1208IB8-TK*
1208 I
2.7 to 5.5
-40 to +85
8 Ld SOIC Tape and Reel MDP0027
ISL1208IB8Z
(Note)
1208 ZI
2.7 to 5.5
-40 to +85
8 Ld SOIC (Pb-free)
MDP0027
ISL1208IB8Z-TK*
(Note)
1208 ZI
2.7 to 5.5
-40 to +85
8 Ld SOIC
Tape andReel (Pb-free)
MDP0027
ISL1208IRT8Z
(Note)
08TZ
2.7 to 5.5
-40 to +85
8 Ld TDFN
(Pb-free)
L8.3x3A
ISL1208IRT8Z-TK*
(Note)
08TZ
2.7 to 5.5
-40 to +85
8 Ld TDFN
Tape and Reel (Pb-free)
L8.3x3A
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
I2C
INTERFACE
RTC
CONTROL
LOGIC
ALARM
FREQUENCY
OUT
RTC
DIVIDER
SDA
BUFFER
CRYSTAL
OSCILLATOR
POR
SWITCH
SCL
BUFFER
SDA
SCL
X1
X2
VDD
VBAT
IRQ/
FOUT
INTERNAL
SUPPLY
VTRIP
SECONDS
MINUTES
HOURS
DAY OF WEEK
DATE
MONTH
YEAR
USER
SRAM
CONTROL
REGISTERS
ISL1208
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| X9317US8IZ-2.7T1 | IC POT DGTL 50K OHM 8-SOIC |
| ISL1208IB8Z | IC RTC LP BATT BACKED SRAM 8SOIC |
| VE-JWP-MZ | CONVERTER MOD DC/DC 13.8V 25W |
| VE-JWM-MZ | CONVERTER MOD DC/DC 10V 25W |
| VE-JWL-MZ | CONVERTER MOD DC/DC 28V 25W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| ISL1208IU8Z-T7A | 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� I2CAL TIME CLK/CLNDR 8LD RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube |
| ISL1208IU8Z-TK | 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� I2CAL TIME CLK/CLNDR 8LD RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube |
| ISL1209 | 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:Low Power RTC with Battery Backed SRAM and Event Detection |
| ISL1209_06 | 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:Low Power RTC with Battery Backed SRAM and Event Detection |
| ISL1209EVAL | 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL1209 EVALUATION BOARD - Bulk |
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