參數(shù)資料
型號: ISL12032IVZ
廠商: Intersil
文件頁數(shù): 26/26頁
文件大?。?/td> 0K
描述: IC RTC LP BATT BACK SRAM 14TSSOP
產品培訓模塊: Solutions for Industrial Control Applications
標準包裝: 960
類型: 時間事件記錄器
特點: 警報器,SRAM,涓流充電器
存儲容量: 128B
時間格式: HH:MM:SS:hh(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 14-TSSOP
包裝: 管件
9
FN6618.3
May 5, 2011
IRQ (Interrupt Output)
This pin provides an interrupt signal output. This signal
notifies a host processor that an alarm has occurred and
requests action. It is an open drain active LOW output.
FOUT (Frequency Output)
This pin outputs a clock signal, which is related to the crystal
frequency. The frequency output is user selectable and
enabled via the I2C bus. The options include seven different
frequencies or disable. It is a CMOS output.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of
the device. The input buffer on this pin is always active (not
gated). It is disabled when the backup power supply on the
VBAT pin is activated to minimize power consumption.
Serial Data (SDA)
SDA is a bi-directional pin used to transfer data into and out
of the device. It has an open drain output and may be OR’ed
with other open drain or open collector outputs. The input
buffer is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor.
The output circuitry controls the fall time of the output signal
with the use of a slope controlled pull-down. The circuit is
designed for 400kHz I2C interface speeds. It is disabled
when the backup power supply on the VBAT pin is activated.
VDD, GND
Chip power supply and ground pins. The device will operate
with a power supply from VDD = 2.7V to 5.5VDC. A 0.1F
capacitor is recommended on the VDD pin to ground.
Functional Description
Power Control Operation
The power control circuit accepts a VDD and a VBAT input.
Many types of batteries can be used with Intersil RTC
products. For example, 3.0V or 3.6V Lithium batteries are
appropriate, and battery sizes are available that can power
the ISL12032 for up to 10 years. Another option is to use a
Super Capacitor for applications where VDD is interrupted
for up to a month. See the “Application Section” on page 24
for more information.
Normal Mode (VDD) to Battery Backup Mode
(VBAT)
To transition from the VDD to VBAT mode, both of the
following conditions must be met:
Condition 1:
VDD < VBAT - VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD < VTRIP
where VTRIP ≈ 2.2V
Battery Backup Mode (VBAT) to Normal Mode
(VDD)
The ISL12032 device will switch from the VBAT to VDD
mode when one of the following conditions occurs:
Condition 1:
VDD > VBAT + VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD > VTRIP + VTRIPHYS
where VTRIPHYS ≈ 30mV
These power control situations are illustrated in Figures 3
and Figure 4.
The I2C bus is normally deactivated in battery backup mode
to reduce power consumption, but can be enabled by setting
the I2CBAT bit. All the other inputs and outputs of the
ISL12032 are active during battery backup mode unless
disabled via the control register.
Power Failure Detection
The ISL12032 provides a Real Time Clock Failure Bit
(RTCF) to detect total power failure. It allows users to
determine if the device has powered up after having lost all
power to the device (both VDD and VBAT very near
0.0VDC). Note that in cases where the VBAT input is at 0.0V
and the VDD input dips to <1.8V, then recovers to normal
level, the SRAM registers may not retain their values
(corrupted bits or bytes may result).
VBAT - VBATHYS
VBAT
VBAT + VBATHYS
BATTERY BACKUP
MODE
VDD
VTRIP
2.2V
1.8V
FIGURE 3. BATTERY SWITCHOVER WHEN VBAT < VTRIP
FIGURE 4. BATTERY SWITCHOVER WHEN VBAT > VTRIP
VTRIP
VBAT
VTRIP + VTRIPHYS
BATTERY BACKUP
MODE
VDD
VTRIP
3.0V
2.2V
ISL12032
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