seen at IRQ/FOUT
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ISL12026IBZ
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 15/24闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC RTC/CALENDAR EEPROM 8-SOIC
妯欐簴鍖呰锛� 98
椤炲瀷锛� 鏅傞悩/鏃ユ
鐗归粸锛� 璀﹀牨鍣紝闁忓勾
鏅傞枔鏍煎紡锛� HH:MM:SS锛�12/24 灏忔檪锛�
鏁�(sh霉)鎿�(j霉)鏍煎紡锛� YY-MM-DD-dd
鎺ュ彛锛� I²C锛�2 绶氫覆鍙�
闆绘簮闆诲锛� 2.7 V ~ 5.5 V
闆诲 - 闆绘簮锛岄浕姹狅細 1.8 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳鍟嗚ō鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜闈細 1245 (CN2011-ZH PDF)
22
FN8231.9
November 30, 2010
Once the registers are set, the following waveform will be
seen at IRQ/FOUT:
Note that the status register AL0 bit will be set each time the
alarm is triggered, but does not need to be read or cleared.
I2C Communications During Battery Backup
Operation in Battery Backup mode is affected by the BSW
and SBIB bits as described earlier. These bits allow flexible
operation of the serial bus and EEPROM in battery backup
mode, but certain operational details need to be clear before
utilizing the different modes. Table 9 describes 4 different
modes possible with using the BSW and SBIB bits, and how
they are affect the serial interface and battery backup
operation.
Mode A - In this mode, selection bits indicate a Standard
Mode switchover combined with I2C operation in battery
backup mode. When the VDD voltage drops below the lower
of VTRIP or VBAT, then the device will enter battery backup
mode. If the microcontroller and bus pull-ups are also
powered by the battery, then the ISL12026 can
communicate in battery backup mode.
Mode B - In this mode, selection bits indicate Legacy mode
switchover combined with I2C operation in battery backup
mode. When the VDD voltage drops below VBAT, the device
will enter battery backup mode. If the microcontroller and
bus pull-ups are also powered by the battery, then the
ISL12026 can communicate in battery backup mode. This
mode places the ISL12026 device in the same operating
mode as the X1226 legacy device.
Mode C - This mode combines Standard mode battery
switchover with no I2C operation in battery backup mode.
When the VDD voltage drops below the lower of VTRIP or
VBAT, then the device will enter battery backup mode and
the I2C interface will be disabled, minimizing VBAT current
drain.
Mode D - This mode combines Legacy mode battery
switchover with no I2C operation in battery backup mode.
When the VDD voltage drops below VBAT, the device will
enter battery backup mode and the I2C interface will be
disabled, minimizing VBAT current drain.
Note that the IRQ/FOUT open drain output pin is active in
battery backup for all modes, allowing clocking of devices
while in battery backup mode. The pull-up on the pin will
need to go to VBAT, and thus battery mode current draw will
increase accordingly.
ALARM0
REGISTER
BIT
DESCRIPTION
76543210 HEX
SCA0
10110000 B0h Seconds set to 30,
enabled
MNA0
00000000 00h Minutes disabled
HRA0
00000000 00h Hours disabled
DTA0
00000000 00h Date disabled
MOA0
00000000 00h Month disabled
DWA0
00000000 00h Day of week disabled
CONTROL
REGISTER
BIT
DESCRIPTION
76543210 HEX
INT
10100000
x0hEnable Alarm and Int
Mode
60s
RTC AND ALARM REGISTERS ARE BOTH 鈥�30鈥� SEC
TABLE 9.
MODE
SBIB BIT BSW BIT
VBAT
SWITCHOVER
VOLTAGE
I2C ACTIVE IN
BATTERY
BACKUP?
EE PROM WRITE/
READ IN BATTERY
BACKUP?
FREQ/IRQ
ACTIVE?
NOTES
A
0
Standard Mode,
VTRIP = 2.2V typ
Yes
NO
YES, needs
pull-up to VBAT
VBAT switchover at lower of VBAT or
VTRIP. Pull-ups needed on I
2C to
VBAT to operate in Battery Backup.
B (X1226
Mode)
0
1
Legacy Mode,
VDD < VBAT
Yes
NO
YES, needs
pull-up to VBAT
VBAT switchover at <VDD. Pull-ups
needed on I2C to VBAT to operate in
Battery Backup.
C
1
0
Standard Mode,
VTRIP = 2.2V typ
NO
YES, needs
pull-up to VBAT
VBAT switchover at lower of VBAT or
VTRIP.
D
1
Legacy Mode,
VDD < VBAT
NO
YES, needs
pull-up to VBAT
VBAT switchover at <VDD.
ISL12026, ISL12026A
鐩搁棞PDF璩囨枡
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