參數(shù)資料
型號(hào): ISD2532P
廠商: WINBOND ELECTRONICS CORP
元件分類(lèi): 音頻合成
英文描述: SINGLE-CHIP, MULTIPLE-MESSAGES, VOICE RECORD/PLAYBACK DEVICE 32-, 40-, 48-, AND 64-SECOND DURATION
中文描述: 32 SEC, SPEECH SYNTHESIZER WITH RCDG, PDIP28
封裝: 0.600 INCH, PLASTIC, DIP-28
文件頁(yè)數(shù): 14/42頁(yè)
文件大?。?/td> 1356K
代理商: ISD2532P
ISD2532/40/48/64
2. The P/
R
pin is taken LOW.
3. The
CE
pin is pulsed LOW. Recording starts,
EOM
goes HIGH to indicate an
operation in progress.
4. When the
CE
pin is pulsed LOW. Recording pauses,
EOM
goes back LOW. The
internal address pointers are not cleared, but the
EOM
marker is stored in memory to
indicate as the message end. The P/
R
pin may be taken HIGH at this time. Any
subsequent
CE
would start a playback at address 0.
5. The
CE
pin is pulsed LOW. Recording starts at the next address after the previous set
EOM
marker.
EOM
goes back HIGH.
[3]
6. When the recording sequences are finished, the final
CE
pulse LOW will end the last
record cycle, leaving a set
EOM
marker at the message end. Recording may also be
terminated by a HIGH level on PD, which will leave a set
EOM
marker.
Playback in Push-Button Mode
1. The PD pin should be LOW.
2. The P/
R
pin is taken HIGH.
3. The
CE
pin is pulsed LOW. Playback starts,
EOM
goes HIGH to indicate an operation
in progress.
4. If the
CE
pin is pulsed LOW or an
EOM
marker is encountered during an operation,
the part will pause. The internal address pointers are not cleared, and
EOM
goes back
LOW. The P/
R
pin may be changed at this time. A subsequent record operation would
not reset the address pointers and the recording would begin where playback ended.
5.
CE
is again pulsed LOW. Playback starts where it left off, with
EOM
going HIGH to
indicate an operation in progress.
6. Playback continues as in steps 4 and 5 until PD is pulsed HIGH or overflow occurs.
7. If in overflow, pulling
CE
LOW will reset the address pointer and start playback from the
beginning. After a PD pulse, the part is reset to address 0.
Note: Push-Button Mode can be used in conjunction with modes M0, M1, and M3.
[3]
If the M1 Operational Mode pin is also HIGH, the just previously written
EOM
bit is erased, and recording starts at that
address.
- 14 -
相關(guān)PDF資料
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