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參數(shù)資料
| 型號(hào)： | IS62WV10248BLL-70XI |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
| 中文描述： | 1M X 8 STANDARD SRAM, 70 ns, UUC |
| 封裝： | DIE |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 89K |
| 代理商： | IS62WV10248BLL-70XI |
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
03/17/06
1
IS62WV10248BLL
ISSI
Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
1M x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
High-speed access time: 55ns, 70ns
CMOS low power operation:
36 mW (typical) operating
12 μW (typical) CMOS standby
TTL compatible interface levels
Single power supply:
2.5V--3.6V V
DD
(IS62WV10248BLL)
Fully static operation: no clock or refresh
required
Three state outputs
Industrial temperature available
Lead-free available
DESCRIPTION
The
ISSI
IS62WV10248BLL is a high-speed, 8M bit static
RAMs organized as 1M words by 8 bits. It is fabricated using
ISSI
's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields high-performance and low power
consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected), the device assumes a standby mode at which
the power dissipation can be reduced down with CMOS input
levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory.
The IS62WV10248BLL is packaged in the JEDEC standard
48-pin mini BGA (7.2mm x 8.7mm).
FUNCTIONAL BLOCK DIAGRAM
MARCH 2006
A0-A19
CS1
OE
WE
1M x 8
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
V
DD
I/O
DATA
CIRCUIT
I/O0-I/O7
CS2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS62WV10248DBLL-45TLI | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS62WV10248DBLL-55MLI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 8M (1Mx8) 55ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS62WV10248DBLL-55MLI-TR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 8M (1Mx8) 55ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS62WV10248DBLL-55TLI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 8M (1Mx8) 55ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS62WV10248DBLL-55TLI-TR | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 8M (1Mx8) 55ns Async 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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