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參數(shù)資料
| 型號： | IS61NP25632 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM |
| 中文描述： | 256K × 32，256K × 36和管道為512k × 18編號WAIT狀態(tài)總線的SRAM |
| 文件頁數(shù)： | 1/20頁 |
| 文件大小： | 157K |
| 代理商： | IS61NP25632 |
This document contains PRELIMINARY INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the
best possible product. We assume no responsibility for any errors which may appear in this publication. Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION
Rev. 00E
04/26/01
1
IS61NP25632
IS61NLP25632 IS61NLP25636 IS61NLP51218
ISSI
256K x 32, 256K x 36 and 512K x 18
PIPELINE 'NO WAIT' STATE BUS SRAM
IS61NP25636
IS61NP51218
FEATURES
100 percent bus utilization
No wait cycles between Read and Write
Internal self-timed write cycle
Individual Byte Write Control
Single R/W (Read/Write) control pin
Clock controlled, registered address,
data and control
Interleaved or linear burst sequence control
using MODE input
Three chip enables for simple depth expansion
and address pipelining for TQFP
Power Down mode
Common data inputs and data outputs
CKE
pin to enable clock and suspend operation
JEDEC 100-pin TQFP, 119 PBGA package
Single +3.3V power supply (± 5%)
NP Version: 3.3V I/O Supply Voltage
NLP Version: 2.5V I/O Supply Voltage
Industrial temperature available
DESCRIPTION
The 8 Meg 'NP' product family feature high-speed,
low-power synchronous static RAMs designed to provide
a burstable, high-performance, 'no wait' state, device for
network and communications customers. They are
organized as 262,144 words by 32 bits, 262,144 words
by 36 bits and 524,288 words by 18 bits, fabricated with
ISSI
's advanced CMOS technology.
Incorporating a 'no wait' state feature, wait cycles are
eliminated when the bus switches from read to write, or
write to read. This device integrates a 2-bit burst counter,
high-speed SRAM core, and high-drive capability outputs
into a single monolithic circuit.
All synchronous inputs pass through registers are controlled
by a positive-edge-triggered single clock input. Operations
may be suspended and all synchronous inputs ignored
when Clock Enable,
CKE
is HIGH. In this state the internal
device will hold their previous values.
All Read, Write and Deselect cycles are initiated by the
ADV input. When the ADV is HIGH the internal burst
counter is incremented. New external addresses can be
loaded when ADV is LOW.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock inputs and when
WE
is LOW.
Separate byte enables allow individual bytes to be written.
A burst mode pin (MODE) defines the order of the burst
sequence. When tied HIGH, the interleaved burst sequence
is selected. When tied LOW, the linear burst sequence is
selected.
PRELIMINARY INFORMATION
APRIL 2001
FAST ACCESS TIME
Symbol
t
KQ
t
KC
Parameter
Clock Access Time
Cycle Time
Frequency
-133
4.2
7.5
133
-100
5
10
100
Units
ns
ns
MHz
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS61NP25632-133B | 256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM |
| IS61NP25632-133BI | 256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM |
| IS61NP51218-5TQ | 256K x 32, 256K x 36 and 512K x 18 PIPELINE NO WAIT STATE BUS SRAM |
| IS61S6432-117TQ | Quadruple 2-Input Positive-OR Gates 14-SO -40 to 85 |
| IS61S6432-117TQI | Quadruple 2-Input Positive-OR Gates 14-SO -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS61NP51218-100TQ | 制造商:Integrated Silicon Solution Inc 功能描述: |
| IS61NVF102418-6.5B3 | 功能描述:靜態(tài)隨機存取存儲器 18Mb,"No-Wait"/Flowthrough,Sync,1Mb x 18,6.5ns,2.5v - I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61NVF102418-6.5B3I | 功能描述:靜態(tài)隨機存取存儲器 18Mb,"No-Wait"/Flowthrough,Sync,1Mb x 18,6.5ns,2.5v - I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61NVF102418-6.5B3I-TR | 功能描述:靜態(tài)隨機存取存儲器 18Mb,"No-Wait"/Flowthrough,Sync,1Mb x 18,6.5ns,2.5v - I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| IS61NVF102418-6.5B3-TR | 功能描述:靜態(tài)隨機存取存儲器 18Mb,"No-Wait"/Flowthrough,Sync,1Mb x 18,6.5ns,2.5v - I/O,165 Ball BGA RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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