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參數(shù)資料
| 型號： | IS41LV82052 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 2M x 8 DRAM With Fast Page Mode(3.3V,2M x 8 帶快速頁模式動態(tài)RAM(刷新 2K）) |
| 中文描述： | 200萬× 8的DRAM與快速頁面模式（3.3伏，200萬× 8帶快速頁模式動態(tài)隨機存儲器（刷新2k）的） |
| 文件頁數(shù)： | 1/17頁 |
| 文件大?。?/td> | 170K |
| 代理商： | IS41LV82052 |
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
12/19/00
1
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. Copyright 2000, Integrated Silicon Solution, Inc.
IS41C82052
IS41LV82052
ISSI
FEATURES
Fast Page Mode Access Cycle
TTL compatible inputs and outputs
Refresh Interval:
-- 2,048 cycles/32 ms
Refresh Mode:
RAS
-Only,
CAS
-before-
RAS
(CBR), and Hidden
Single power supply:
5V±10% or 3.3V ± 10%
Byte Write and Byte Read operation via two
CAS
Industrial temperature range -40°C to 85°C
DESCRIPTION
The
ISSI
IS41C82052 and IS41LV82052 are 2,097,152 x 8-bit
high-performance CMOS Dynamic Random Access
Memory. The Fast Page Mode allows 2,048 random
accesses within a single row with access cycle time as
short as 20 ns per 4-bit word.
These features make the IS41C82052 and IS41LV82052
ideally suited for high-bandwidth graphics, digital signal
processing, high-performance computing systems, and
peripheral applications.
The IS41C82052 and IS41LV82052 are packaged in 28-pin
300-mil SOJ and 28-pin TSOP (Type II) with JEDEC
standard pinouts.
2M x 8 (16-MBIT) DYNAMIC RAM
WITH FAST PAGE MODE
NOVEMBER 2000
KEY TIMING PARAMETERS
Parameter
-50
-60
Unit
RAS
Access Time (t
RAC
)
50
60
ns
CAS
Access Time (t
CAC
)
13
15
ns
Column Address Access Time (t
AA
)
25
30
ns
Fast Page Mode Cycle Time (t
PC
)
20
25
ns
Read/Write Cycle Time (t
RC
)
84
104
ns
PRODUCT SERIES OVERVIEW
Part No.
Refresh
Voltage
IS41C82052
2K
5V ± 10%
IS41LV82052
2K
3.3V ± 10%
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
I/O0
I/O1
I/O2
I/O3
WE
RAS
NC
A10
A0
A1
A2
A3
VCC
GND
I/O7
I/O6
I/O5
I/O4
CAS
OE
A9
A8
A7
A6
A5
A4
GND
PIN DESCRIPTIONS
A0-A10
Address Inputs
I/O0-7
Data Inputs/Outputs
WE
Write Enable
OE
Output Enable
RAS
Row Address Strobe
CAS
Column Address Strobe
Vcc
Power
GND
Ground
NC
No Connection
PIN CONFIGURATION
28 Pin SOJ, TSOP (Type II)
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| IS41LV16100A-50TI | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41LV16100A-50TL | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41LV16100A-50TLI | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
| IS41LV16100A-60K | 1M x 16 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS41LV82052-50J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Fast Page Mode DRAM |
| IS41LV82052-50JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Fast Page Mode DRAM |
| IS41LV82052-50T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Fast Page Mode DRAM |
| IS41LV82052-50TI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Fast Page Mode DRAM |
| IS41LV82052-60J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 Fast Page Mode DRAM |
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