參數(shù)資料
型號: IRU3033CS
廠商: International Rectifier
英文描述: 8-PIN PWM SWITCHER AND LINEAR CONTROLLER IC
中文描述: 8引腳的PWM切換器和線性控制器芯片
文件頁數(shù): 2/12頁
文件大小: 76K
代理商: IRU3033CS
IRU3033
2
Rev. 1.7
07/17/02
www.irf.com
ABSOLUTE MAXIMUM RATINGS
V
12
,V
12(SW)
Supply Voltages ....................................... 20V
Fb Pin Voltages ........................................................ -0.3V To 5V
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature ................................ 0°C To 150°C
PACKAGE INFORMATION
8-PIN PLASTIC SOIC (S)
Linear Controller Section
Fb Voltage Initial Accuracy
Fb Voltage Total Variation
Fb Voltage Line Regulation
Fb Input Bias Current
Maximum Drive Current
V
12
Supply Current
Switching Controller Section
Fb Voltage Initial Accuracy
Fb Voltage Total Variation
Fb Voltage Line Regulation
Fb Input Bias Current
Min On Time
Min Off Time
V
HYST
Pin Output-HI
V
HYST
Pin Output-LO
Supply Current
Maximum Duty Cycle
Minimum Duty Cycle
Gate Drive Rise/Fall Time
Unless otherwise specified, the following specification applies over V
12
=V
12(SW)
=12V and T
A
=0 to 70°C. Low duty
cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature.
PARAMETER
SYM TEST CONDITION MIN TYP MAX UNITS
V
FB2
T
J
=25
8
C, Drv2=V
FB2
, C
L
=100
μ
F
Drv2=V
FB2
, C
L
=100
μ
F
10<V
12
<14V, Drv2=V
FB2
, C
L
=100
μ
F
V
FB2
=1.25V
V
FB2
=1V, V
FB1
=1.5V
V
FB2
=1V, V
FB1
=1.5V, I
DRV2
=0
θ
JA
=160
8
C/W
ELECTRICAL SPECIFICATIONS
Drv1
V
12(SW)
V
FB1
V
HYST
Gnd
V
FB2
Drv2
V
12
4
3
2
1
5
6
7
8
TOP VIEW
I
FB2
I
DRV(max)
I
12
V
FB1
I
FB1
I
12(SW)
D
MAX
D
MIN
V
GATE
T
J
=25
8
C
V
FB1
=1.25V
V
FB1
is sq wave with 300ns on
time and 2
μ
s off time
V
FB1
is sq wave with 300ns off
time and 2
μ
s on time
I
SOURCE
=500
μ
A, V
FB1
=1.5V
I
SINK
=500
μ
A, V
FB1
=1V
V
FB1
=1V, V
FB2
=1.5V
V
FB1
=1V
V
FB1
=1.5V
Load=IRL3303
1.237
1.225
-1
1.237
1.225
-1
11
0
1.250
1.250
0.2
50
5
1.250
1.250
0.2
800
800
10
70
1.262
1.275
+1
1.262
1.275
+1
1
100
V
V
%
μ
A
mA
mA
V
V
%
μ
A
ns
ns
V
V
mA
%
%
ns
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