
249
8154B–AVR–07/09
ATmega16A
Notes:
1. PRIVATE_SIGNAL1 should always be scanned in as zero.
2. PRIVATE:SIGNAL2 should always be scanned in as zero.
24.7
Boundary-scan Description Language Files
Boundary-scan Description Language (BSDL) files describe Boundary-scan capable devices in
a standard format used by automated test-generation software. The order and function of bits in
the Boundary-scan Data Register are included in this description. A BSDL file for ATmega16A is
available.
24.8
Register Description
24.8.1
MCUCSR – MCU Control and Status Register
The MCU Control and Status Register contains control bits for general MCU functions, and pro-
vides information on which reset source caused an MCU Reset.
Bit 7 – JTD: JTAG Interface Disable
When this bit is zero, the JTAG interface is enabled if the JTAGEN Fuse is programmed. If this
bit is one, the JTAG interface is disabled. In order to avoid unintentional disabling or enabling of
the JTAG interface, a timed sequence must be followed when changing this bit: The application
software must write this bit to the desired value twice within four cycles to change its value.
If the JTAG interface is left unconnected to other JTAG circuitry, the JTD bit should be set to
one. The reason for this is to avoid static current at the TDO pin in the JTAG interface.
Bit 4 – JTRF: JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register selected by
the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or by writing a logic
zero to the flag.
4
PA1.Control
3
PA1.Pullup_Enable
2PA0.Data
1
PA0.Control
0
PA0.Pullup_Enable
Table 24-8.
ATmega16A Boundary-scan Order (Continued)
Bit Number
Signal Name
Module
Bit
7654
321
0
JTD
ISC2
–JTRF
WDRF
BORF
EXTRF
PORF
MCUCSR
Read/Write
R/W
R
R/W
Initial Value
0
See Bit Description